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[LoongArch64] Enable printing disassembly instructions under release …
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…mode for JitDisasm. (#101281)
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LuckyXu-HF authored Apr 26, 2024
1 parent a45853c commit aec52ab
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Showing 2 changed files with 11 additions and 51 deletions.
57 changes: 11 additions & 46 deletions src/coreclr/jit/emitloongarch64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3848,8 +3848,7 @@ size_t emitter::emitOutputInstr(insGroup* ig, instrDesc* id, BYTE** dp)
}
}

#ifdef DEBUG
if (emitComp->opts.disAsm || emitComp->verbose)
if (emitComp->opts.disAsm INDEBUG(|| emitComp->verbose))
{
code_t* cp = (code_t*)(*dp + writeableOffset);
while ((BYTE*)cp != dstRW)
Expand All @@ -3859,6 +3858,7 @@ size_t emitter::emitOutputInstr(insGroup* ig, instrDesc* id, BYTE** dp)
}
}

#ifdef DEBUG
if (emitComp->compDebugBreak)
{
// For example, set JitBreakEmitOutputInstr=a6 will break when this method is called for
Expand All @@ -3882,8 +3882,6 @@ size_t emitter::emitOutputInstr(insGroup* ig, instrDesc* id, BYTE** dp)
/*****************************************************************************/
/*****************************************************************************/

#ifdef DEBUG

// clang-format off
static const char* const RegNames[] =
{
Expand Down Expand Up @@ -3964,19 +3962,21 @@ void emitter::emitDisInsName(code_t code, const BYTE* addr, instrDesc* id)
{
const BYTE* insAdr = addr - writeableOffset;

bool disOpcode = !emitComp->opts.disDiffable;
bool disAddr = emitComp->opts.disAddr;
if (disAddr)
#ifdef DEBUG
if (emitComp->opts.disAddr)
{
printf(" 0x%llx", insAdr);
}

printf(" ");

if (disOpcode)
if (!emitComp->opts.disDiffable)
{
printf("%08X ", code);
}
#else
printf(" ");
#endif

const int regd = code & 0x1f;
const int regj = (code >> 5) & 0x1f;
Expand Down Expand Up @@ -4540,51 +4540,16 @@ void emitter::emitDispIns(
}
}

#ifdef DEBUG
/*****************************************************************************
*
* Display a stack frame reference.
*/

void emitter::emitDispFrameRef(int varx, int disp, int offs, bool asmfm)
{
printf("[");

if (varx < 0)
printf("TEMP_%02u", -varx);
else
emitComp->gtDispLclVar(+varx, false);

if (disp < 0)
printf("-0x%02x", -disp);
else if (disp > 0)
printf("+0x%02x", +disp);

printf("]");

if (varx >= 0 && emitComp->opts.varNames)
{
LclVarDsc* varDsc;
const char* varName;

assert((unsigned)varx < emitComp->lvaCount);
varDsc = emitComp->lvaTable + varx;
varName = emitComp->compLocalVarName(varx, offs);

if (varName)
{
printf("'%s", varName);

if (disp < 0)
printf("-%d", -disp);
else if (disp > 0)
printf("+%d", +disp);

printf("'");
}
}
NYI_LOONGARCH64("emitDispFrameRef-----unused on LoongArch64.");
}

#endif // DEBUG
#endif

// Generate code for a load or store operation with a potentially complex addressing mode
// This method handles the case of a GT_IND with contained GT_LEA op1 of the x86 form [base + index*sccale + offset]
Expand Down
5 changes: 0 additions & 5 deletions src/coreclr/jit/emitloongarch64.h
Original file line number Diff line number Diff line change
Expand Up @@ -19,10 +19,6 @@ struct CnsVal
bool cnsReloc;
};

#ifdef DEBUG
/************************************************************************/
/* Debug-only routines to display instructions */
/************************************************************************/
enum insDisasmFmt
{
DF_G_INVALID = 0,
Expand Down Expand Up @@ -108,7 +104,6 @@ code_t emitGetInsMask(int ins);
insDisasmFmt emitGetInsFmt(instruction ins);
void emitDispInst(instruction ins);
void emitDisInsName(code_t code, const BYTE* addr, instrDesc* id);
#endif // DEBUG

void emitIns_J_cond_la(instruction ins, BasicBlock* dst, regNumber reg1 = REG_R0, regNumber reg2 = REG_R0);
void emitIns_I_la(emitAttr attr, regNumber reg, ssize_t imm);
Expand Down

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