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Fix some assert's errors for ARM64-LoongArch64-RISCV64.
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Also fix some errors about codegen for LoongArch64-RISCV64.
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@shushanhf
shushanhf committed Sep 20, 2023
1 parent b049f42 commit c6d06f2
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Showing 3 changed files with 14 additions and 18 deletions.
4 changes: 2 additions & 2 deletions src/coreclr/jit/codegenarmarch.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3312,7 +3312,7 @@ void CodeGen::genCall(GenTreeCall* call)

regNumber tmpReg = call->GetSingleTempReg();
// Register where we save call address in should not be overridden by epilog.
assert((tmpReg & (RBM_INT_CALLEE_TRASH & ~RBM_LR)) == tmpReg);
assert((genRegMask(tmpReg) & (RBM_INT_CALLEE_TRASH & ~RBM_LR)) == genRegMask(tmpReg));

regNumber callAddrReg =
call->IsVirtualStubRelativeIndir() ? compiler->virtualStubParamInfo->GetReg() : REG_R2R_INDIRECT_PARAM;
Expand Down Expand Up @@ -3572,7 +3572,7 @@ void CodeGen::genCallInstruction(GenTreeCall* call)
else
{
// Register where we save call address in should not be overridden by epilog.
assert((targetAddrReg & (RBM_INT_CALLEE_TRASH & ~RBM_LR)) == targetAddrReg);
assert((genRegMask(targetAddrReg) & (RBM_INT_CALLEE_TRASH & ~RBM_LR)) == genRegMask(targetAddrReg));
}

// We have now generated code loading the target address from the indirection cell into `targetAddrReg`.
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18 changes: 7 additions & 11 deletions src/coreclr/jit/codegenloongarch64.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -6482,11 +6482,11 @@ void CodeGen::genCall(GenTreeCall* call)

regNumber tmpReg = call->GetSingleTempReg();
// Register where we save call address in should not be overridden by epilog.
assert((tmpReg & (RBM_INT_CALLEE_TRASH & ~RBM_RA)) == tmpReg);
assert((genRegMask(tmpReg) & (RBM_INT_CALLEE_TRASH & ~RBM_RA)) == genRegMask(tmpReg));

regNumber callAddrReg =
call->IsVirtualStubRelativeIndir() ? compiler->virtualStubParamInfo->GetReg() : REG_R2R_INDIRECT_PARAM;
GetEmitter()->emitIns_R_R(ins_Load(TYP_I_IMPL), emitActualTypeSize(TYP_I_IMPL), tmpReg, callAddrReg);
GetEmitter()->emitIns_R_R_I(ins_Load(TYP_I_IMPL), emitActualTypeSize(TYP_I_IMPL), tmpReg, callAddrReg, 0);
// We will use this again when emitting the jump in genCallInstruction in the epilog
call->gtRsvdRegs |= genRegMask(tmpReg);
}
Expand Down Expand Up @@ -6710,13 +6710,13 @@ void CodeGen::genCallInstruction(GenTreeCall* call)
// For fast tailcalls we have already loaded the call target when processing the call node.
if (!call->IsFastTailCall())
{
GetEmitter()->emitIns_R_R(ins_Load(TYP_I_IMPL), emitActualTypeSize(TYP_I_IMPL), targetAddrReg,
callThroughIndirReg);
GetEmitter()->emitIns_R_R_I(ins_Load(TYP_I_IMPL), emitActualTypeSize(TYP_I_IMPL), targetAddrReg,
callThroughIndirReg, 0);
}
else
{
// Register where we save call address in should not be overridden by epilog.
assert((targetAddrReg & (RBM_INT_CALLEE_TRASH & ~RBM_RA)) == targetAddrReg);
assert((genRegMask(targetAddrReg) & (RBM_INT_CALLEE_TRASH & ~RBM_RA)) == genRegMask(targetAddrReg));
}

// We have now generated code loading the target address from the indirection cell into `targetAddrReg`.
Expand Down Expand Up @@ -7681,19 +7681,15 @@ inline void CodeGen::genJumpToThrowHlpBlk_la(
callType = emitter::EC_INDIR_R;
callTarget = REG_DEFAULT_HELPER_CALL_TARGET;

// ssize_t imm = (4 + 1 + 1) << 2;// 4=li, 1=load, 1=jirl.

// instGen_Set_Reg_To_Imm(EA_PTR_DSP_RELOC, callTarget, (ssize_t)pAddr);
// emit->emitIns_R_R_I(INS_ld_d, EA_PTRSIZE, callTarget, callTarget, 0);
if (compiler->opts.compReloc)
{
ssize_t imm = (2 + 1) << 2; // , 1=jirl.
ssize_t imm = (3 + 1) << 2; // to jirl's next instr.
emit->emitIns_R_R_I(ins, EA_PTRSIZE, reg1, reg2, imm);
GetEmitter()->emitIns_R_AI(INS_bl, EA_PTR_DSP_RELOC, callTarget, (ssize_t)pAddr);
}
else
{
ssize_t imm = (3 + 1) << 2; // , 1=jirl.
ssize_t imm = (4 + 1) << 2; // to jirl's next instr.
emit->emitIns_R_R_I(ins, EA_PTRSIZE, reg1, reg2, imm);

// GetEmitter()->emitIns_R_I(INS_pcaddu12i, EA_PTRSIZE, callTarget, (ssize_t)pAddr);
Expand Down
10 changes: 5 additions & 5 deletions src/coreclr/jit/codegenriscv64.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -6077,11 +6077,11 @@ void CodeGen::genCall(GenTreeCall* call)

regNumber tmpReg = call->GetSingleTempReg();
// Register where we save call address in should not be overridden by epilog.
assert((tmpReg & (RBM_INT_CALLEE_TRASH & ~RBM_RA)) == tmpReg);
assert((genRegMask(tmpReg) & (RBM_INT_CALLEE_TRASH & ~RBM_RA)) == genRegMask(tmpReg));

regNumber callAddrReg =
call->IsVirtualStubRelativeIndir() ? compiler->virtualStubParamInfo->GetReg() : REG_R2R_INDIRECT_PARAM;
GetEmitter()->emitIns_R_R(ins_Load(TYP_I_IMPL), emitActualTypeSize(TYP_I_IMPL), tmpReg, callAddrReg);
GetEmitter()->emitIns_R_R_I(ins_Load(TYP_I_IMPL), emitActualTypeSize(TYP_I_IMPL), tmpReg, callAddrReg, 0);
// We will use this again when emitting the jump in genCallInstruction in the epilog
call->gtRsvdRegs |= genRegMask(tmpReg);
}
Expand Down Expand Up @@ -6305,13 +6305,13 @@ void CodeGen::genCallInstruction(GenTreeCall* call)
// For fast tailcalls we have already loaded the call target when processing the call node.
if (!call->IsFastTailCall())
{
GetEmitter()->emitIns_R_R(ins_Load(TYP_I_IMPL), emitActualTypeSize(TYP_I_IMPL), targetAddrReg,
callThroughIndirReg);
GetEmitter()->emitIns_R_R_I(ins_Load(TYP_I_IMPL), emitActualTypeSize(TYP_I_IMPL), targetAddrReg,
callThroughIndirReg, 0);
}
else
{
// Register where we save call address in should not be overridden by epilog.
assert((targetAddrReg & (RBM_INT_CALLEE_TRASH & ~RBM_RA)) == targetAddrReg);
assert((genRegMask(targetAddrReg) & (RBM_INT_CALLEE_TRASH & ~RBM_RA)) == genRegMask(targetAddrReg));
}

// We have now generated code loading the target address from the indirection cell into `targetAddrReg`.
Expand Down

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