JIT: Enabled embedded broadcast for binary ops (#87946)

* Enabled embedded broadcast for the following ops:
and, andn, or, xor,
min, max,
div, mul, mull, sub,
variable shiftleftlogical/rightarithmetic/rightlogical

* Bug fix:
 JIT used to use a uniform intrinsic for bitwise operations with all data
 types, embedded broadcast is sensitive to input size in this case,
 adding a helper to let emitter aware when input size is long/ulong.

* reset the instruction in the later phase
when embedded broadcast is actually enabled

* filter irrelevant data type in embedded broadcast
There are cases when broadcast node are falsely contained by a embedded
broadcast compatible node, while the data type is actually not supported
Adding extra logics to avoid this situation.

* update the condition on instruction reset:
instructions with either long or ulong as basetype should be reset to
qword instructions.

* Apply format patch

* Resolve reviews:
make the typecheck based on broadcast node it self.

* Resolve review:
use `varTypeIsSmall` type check to cover all the unsupported data type
in embedded broadcast.

* Resolve reviews:
1. put the IsBitwiseInstruction to a proper place.
2. nit: restored unnecessary line delete.

src/coreclr/jit/emitxarch.cpp

@@ -6081,6 +6081,30 @@ bool emitter::IsJmpInstruction(instruction ins)
     return (ins == INS_i_jmp) || (ins == INS_jmp) || (ins == INS_l_jmp) || (ins == INS_tail_i_jmp);
 }
 
+//------------------------------------------------------------------------
+// IsBitwiseInstruction: Determine if an instruction is a bit-wise instruction.
+//
+// Arguments:
+//    ins       -- The instruction being checked
+//
+// Return Value:
+//    true if the instruction qualifies; otherwise, false
+//
+bool emitter::IsBitwiseInstruction(instruction ins)
+{
+    switch (ins)
+    {
+        case INS_pand:
+        case INS_pandn:
+        case INS_por:
+        case INS_pxor:
+            return true;
+
+        default:
+            return false;
+    }
+}
+
 // TODO-XArch-CQ: There are places where the fact that an instruction zero-extends
 // is not an important detail, such as when "regular" floating-point code is generated
 //

src/coreclr/jit/emitxarch.h

@@ -145,6 +145,7 @@ bool IsRedundantStackMov(instruction ins, insFormat fmt, emitAttr size, regNumbe
 
 static bool IsJccInstruction(instruction ins);
 static bool IsJmpInstruction(instruction ins);
+static bool IsBitwiseInstruction(instruction ins);
 
 #ifdef TARGET_64BIT
 bool AreUpperBitsZero(regNumber reg, emitAttr size);