[ARM64/Linux] Inefficiencies when using initializing/cleaning unsafe pointers

[TamarChristinaArm]

For the following case with QuickJIT turned off

static int[] Test(int[] a)
{
  unsafe {
    fixed (int *a_ptr = a, b_ptr = b)
    {
    }
  }
  return a;
}

The initialization of the pointer correctly uses the zero register

        F9000FBF          str     xzr, [fp,#24] // [V05 loc2]
        F9000BBF          str     xzr, [fp,#16] // [V06 loc3]

However it doesn't use stp/ldp when it's possible to.

also when cleaning up the strs suddenly don't use xzr anymore

        D2800001          mov     x1, #0
        F9000FA1          str     x1, [fp,#24]  // [V05 loc2]
        F9000BA1          str     x1, [fp,#16]  // [V06 loc3]

/CC @CarolEidt @tannergooding

category:cq
theme:basic-cq
skill-level:intermediate
cost:medium

[mikedn]

also when cleaning up the strs suddenly don't use xzr anymore

It looks like the code in lowerarmarch.cpp's Lowering::ContainCheckStoreLoc was copied from xarch/arm32 without proper adjustment for arm64:

// If the source is a containable immediate, make it contained, unless it is
// an int-size or larger store of zero to memory, because we can generate smaller code
// by zeroing a register and then storing it.

Obviously, arm64 doesn't need to zero a register. Properluy checking for 0 should fix this.

However it doesn't use stp/ldp when it's possible to.

Unfortunately the JIT doesn't have any support for something like this. Perhaps it could be done in codegen, by looking ahead at the IR. Otherwise it would be problematic to encode a stp-like operation in JIT's IR at an earlier stage.

[AndyAyersMS]

Might want to consider fixing the zero reg issue for 3.0, but will mark as future.

[CarolEidt]

Might want to consider fixing the zero reg issue for 3.0, but will mark as future.

Right - the zero reg issue should be pretty straightforward to fix, but as @mikedn indicates, the allocation and code generation for register pairs is somewhat more complex (though, thankfully, should be easier than the arm32 doubles!)

[SwapnilGaikwad]

The zero reg issue is already fixed by the PR #52269.

Assembly with and without the above patch is following.
Without patch:

mov     x0, xzr
str     x0, [fp, #0x38]	// [V04 loc2]
mov     x0, xzr
str     x0, [fp, #0x30]	// [V05 loc3]

With patch:

str     xzr, [fp, #0x38]	// [V04 loc2]
str     xzr, [fp, #0x30]	// [V05 loc3]

Regarding ldp/stp usage, there are other issues (for ldp: #35132, #35130; stp: #35133, #35134) tracking it.

[a74nh]

@kunalspathak

[kunalspathak]

Thanks for checking @SwapnilGaikwad .