Improving Arm64 Performance in .NET 8.0

[kunalspathak]

As we did in the past for .NET 5 and .NET 7, we would like to continue improving Arm64 in .NET 8 as well. Here are the top-level issues that we want to address. These are the issues that were identified in the past releases but were not resolved. As we make progress, we will add more issues to the list.

Top Items

Planned for Jul-Aug'23

• Real world performance analysis
  • PDN: Report here
    • LSRA-throughput: Iterate over the regMaskTP instead all registers #87424
  • ML.NET
  • Roslyn
    • ARM64 Real World - Roslyn #89119

Planned for Apr-Jun'23

• Arm64: Generate conditional comparison and selection instructions #55364
• Arm64: Use VectorTableLookup/VectorTableLookupExtension APIs in libraries #84328 (WIP by @a74nh and @SwapnilGaikwad, 2 scenarios done)
• Investigate instability in TE for Arm64 #77916

Planned for Jan-Mar'23

• Arm64: Generate conditional comparison and selection instructions #55364
• [Arm64] Peephole optimization opportunities #55365
• Investigate instability in TE for Arm64 #77916
• [LSRA] Add support for allocating consecutive registers #39457
• API Proposal : Arm TableVectorLookup and TableVectorExtension intrinsics #1277

[Future] Other CQ improvements

• Enable multi-register intrinsics support for Arm64 #64921 (at risk)
• Review the multi-op instruction usage for Arm64 #68028 (at risk)
• (@mangod9) Arm64: Revisit the heuristics for IO completion poller threads #67266 - Revisit after concurrent queue fix
• [arm/arm64] Leaf frames, saving LR, and return address hijacking #35274
• Arm64: Consider using "DC ZVA" instruction #67244
• [RyuJIT][ARM] Redundant overflow check in "C / X" #46010
• Optimize jump stubs on arm64 #62302
• Arm64: Evaluate if it is possible to combine subsequent field loads in a single load #64815
• [ARM64/Linux] Inefficient conditionals branching #12735
• Arm64: In mod operation happening inside the loop, if divisor is an invariant, hoist the divisor checks #64795
• Double constants usage in a loop can be CSEed #35257 (cut)
• [ARM64/Linux] Inefficiencies when using initializing/cleaning unsafe pointers #12736
• API design for SVE and Vector (Draft: Initial Draft for Vector SIMD Codegen Enhancements designs#268) (cut)
• [ARM64] Performance regression: Utf8Encoding #41699

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Issue Details

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As we did in the past for .NET 5 and .NET 7, we would like to continue improving Arm64 in .NET 8 as well. Here are the top-level issues that we want to address. These are the issues that were identified in the past releases but were not resolved. As we make progress, we will add more issues to the list.

Top Items

• Arm64: Generate conditional comparison and selection instructions #55364 (WIP by @a74nh: Arm64: Add If conversion pass #73472)
• API design for SVE and Vector (Draft: Initial Draft for Vector SIMD Codegen Enhancements designs#268)
• [LSRA] Add support for allocating consecutive registers #39457
• [Arm64] Peephole optimization opportunities #55365
• Enable multi-register intrinsics support for Arm64 #64921
• API Proposal : Arm TableVectorLookup and TableVectorExtension intrinsics #1277

Other CQ improvements

• [ARM64] Performance regression: Utf8Encoding #41699
• (@mangod9) Arm64: Revisit the heuristics for IO completion poller threads #67266 - Revisit after concurrent queue fix
• Arm64: Evaluate if it is possible to combine subsequent field loads in a single load #64815
• [ARM64/Linux] Inefficient conditionals branching #12735
• Enable multi-register intrinsics support for Arm64 #64921
• Arm64: Consider using "DC ZVA" instruction #67244
• [ARM64] Performance regression: Utf8Encoding #41699
• Arm64: In mod operation happening inside the loop, if divisor is an invariant, hoist the divisor checks #64795
• Optimize jump stubs on arm64 #62302
• Double constants usage in a loop can be CSEed #35257

Author:	kunalspathak
Assignees:	-
Labels:	area-CodeGen-coreclr, User Story
Milestone:	8.0.0

[kunalspathak]

Closing this for .NET 8. I will open a new issue for .NET 9 once we finalize the plans.