Generalize Arm64 ldr/str to ldp/stp optimization

[BruceForstall]

#77540 introduced a JIT peephole optimization to convert consecutive ldr/str instructions to ldp/stp. It was limited to avoiding this optimization when either of the two ldr/str represented lclvar, which requires more work to properly handle the GC effects.

See #77540 (review) for more discussion.

This issue tracks generalizing the optimization to handle the lclvar cases.

Also, the optimization was restricted to not work in prologs or epilogs, to avoid affecting unwind codes. There are two potential improvements here:

1. Make sure the unwind codes work with the optimization.
2. Allow the optimization in the non-OS (not unwindable) part of the prolog/epilog.

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Issue Details

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#77540 introduced a JIT peephole optimization to convert consecutive ldr/str instructions to ldp/stp. It was limited to avoiding this optimization when either of the two ldr/str represented lclvar, which requires more work to properly handle the GC effects.

See #77540 (review) for more discussion.

This issue tracks generalizing the optimization to handle the lclvar cases.

Author:	BruceForstall
Assignees:	-
Labels:	arch-arm64, area-CodeGen-coreclr
Milestone:	8.0.0

[BruceForstall]

Regarding the lclvar case, emitIns_S_S_R_R() might be a place to look.

[kunalspathak]

#85032 fixes the general code except prolog/epilog and unwind code. I will leave this issue open.

[kunalspathak]

Just to experiment, I tried to comment below lines and see lot of methods improved for benchmarks collection.

runtime/src/coreclr/jit/emitarm64.cpp

Lines 16648 to 16653 in 049acec

	// Don't remove instructions whilst in prologs or epilogs, as these contain "unwindable"
	// parts, where we need to report unwind codes to the OS,
	if (emitIGisInProlog(emitCurIG) || emitIGisInEpilog(emitCurIG))
	{
	return eRO_none;
	}

2,387 contexts with diffs (2,387 improvements, 0 regressions, 0 same size)
  -12,172 bytes