JIT ARM64-SVE: Add BitwiseClear and BooleanNot #101853

a74nh · 2024-05-03T16:30:38Z

Test results:

❯ ~/stress_tester.py $CORE_ROOT/corerun ./artifacts/tests/coreclr/linux.arm64.Checked/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/HardwareIntrinsics_Arm_ro.dll Sve_BitwiseClear
Starting test: /home/alahay01/dotnet/runtime_sve_api/artifacts/tests/coreclr/linux.arm64.Checked/Tests/Core_Root/corerun ./artifacts/tests/coreclr/linux.arm64.Checked/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/HardwareIntrinsics_Arm_ro.dll Sve_BitwiseClear
===================Running default===================
------------------- {} -------------------
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_BitwiseClear_sbyte() : 19
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_BitwiseClear_short() : 19
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_BitwiseClear_int() : 19
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_BitwiseClear_long() : 19
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_BitwiseClear_byte() : 19
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_BitwiseClear_ushort() : 19
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_BitwiseClear_uint() : 19
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_BitwiseClear_ulong() : 19
===================Running jitstress===================
------------------- {'JitMinOpts': '1'} -------------------
------------------- {'JitStress': '1'} -------------------
------------------- {'JitStress': '2'} -------------------
------------------- {'JitStress': '1', 'TieredCompilation': '1'} -------------------
------------------- {'JitStress': '2', 'TieredCompilation': '1'} -------------------
------------------- {'TailcallStress': '1'} -------------------
------------------- {'ReadyToRun': '0'} -------------------
===================Running jitstressregs===================
------------------- {'JitStressRegs': '1'} -------------------
------------------- {'JitStressRegs': '2'} -------------------
------------------- {'JitStressRegs': '3'} -------------------
------------------- {'JitStressRegs': '4'} -------------------
------------------- {'JitStressRegs': '8'} -------------------
------------------- {'JitStressRegs': '0x10'} -------------------
------------------- {'JitStressRegs': '0x80'} -------------------
------------------- {'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStressRegs': '0x2000'} -------------------
===================Running jitstress2-jitstressregs===================
------------------- {'JitStress': '2', 'JitStressRegs': '1'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '2'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '3'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '4'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '8'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x10'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x80'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x2000'} -------------------

❯ ~/stress_tester.py $CORE_ROOT/corerun ./artifacts/tests/coreclr/linux.arm64.Checked/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/HardwareIntrinsics_Arm_ro.dll Sve_BooleanNot
Starting test: /home/alahay01/dotnet/runtime_sve_api/artifacts/tests/coreclr/linux.arm64.Checked/Tests/Core_Root/corerun ./artifacts/tests/coreclr/linux.arm64.Checked/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/HardwareIntrinsics_Arm_ro.dll Sve_BooleanNot
===================Running default===================
------------------- {} -------------------
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_BooleanNot_sbyte() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_BooleanNot_short() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_BooleanNot_int() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_BooleanNot_long() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_BooleanNot_byte() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_BooleanNot_ushort() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_BooleanNot_uint() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_BooleanNot_ulong() : 16
===================Running jitstress===================
------------------- {'JitMinOpts': '1'} -------------------
------------------- {'JitStress': '1'} -------------------
------------------- {'JitStress': '2'} -------------------
------------------- {'JitStress': '1', 'TieredCompilation': '1'} -------------------
------------------- {'JitStress': '2', 'TieredCompilation': '1'} -------------------
------------------- {'TailcallStress': '1'} -------------------
------------------- {'ReadyToRun': '0'} -------------------
===================Running jitstressregs===================
------------------- {'JitStressRegs': '1'} -------------------
------------------- {'JitStressRegs': '2'} -------------------
------------------- {'JitStressRegs': '3'} -------------------
------------------- {'JitStressRegs': '4'} -------------------
------------------- {'JitStressRegs': '8'} -------------------
------------------- {'JitStressRegs': '0x10'} -------------------
------------------- {'JitStressRegs': '0x80'} -------------------
------------------- {'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStressRegs': '0x2000'} -------------------
===================Running jitstress2-jitstressregs===================
------------------- {'JitStress': '2', 'JitStressRegs': '1'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '2'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '3'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '4'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '8'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x10'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x80'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x2000'} -------------------

dotnet-issue-labeler · 2024-05-03T16:30:46Z

Note regarding the new-api-needs-documentation label:

This serves as a reminder for when your PR is modifying a ref *.cs file and adding/modifying public APIs, please make sure the API implementation in the src *.cs file is documented with triple slash comments, so the PR reviewers can sign off that change.

dotnet-policy-service · 2024-05-03T16:31:10Z

Tagging subscribers to this area: @dotnet/area-system-runtime-intrinsics
See info in area-owners.md if you want to be subscribed.

a74nh · 2024-05-03T16:31:22Z

src/coreclr/jit/emitarm64sve.cpp

@@ -3602,12 +3602,7 @@ void emitter::emitInsSve_R_R_R(instruction     ins,
            fmt = IF_SVE_GW_3A;
            break;

-        case INS_sve_clz:


The asserts for these instructions were wrong - it allowed cases that don't exist.

a74nh · 2024-05-03T16:31:57Z

@dotnet/arm64-contrib @kunalspathak

kunalspathak · 2024-05-03T22:04:53Z

/azp run runtime-coreclr superpmi-replay, runtime-coreclr superpmi-diffs

azure-pipelines · 2024-05-03T22:05:12Z

Azure Pipelines successfully started running 2 pipeline(s).

kunalspathak

nit: Suggested change to remove instruction from summary docs.

kunalspathak · 2024-05-03T22:10:20Z

src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve.cs

+        ///   BIC Ztied1.B, Pg/M, Ztied1.B, Zop2.B
+        ///   BIC Zresult.D, Zop1.D, Zop2.D
+        /// svbool_t svbic[_b]_z(svbool_t pg, svbool_t op1, svbool_t op2)
+        ///   BIC Presult.B, Pg/Z, Pop1.B, Pop2.B


I don't think we are supporting the BIC Presult.B, Pg/Z, Pop1.B, Pop2.B. Can we remove it from the summary docs in this and other APIs?

Sve. BitwiseClear(mask) will convert the mask to a normal vector and use the vector BIC instruction. That's not great. We should be using the mask variant where possible. We need something in lowering? hwinstrinsics? to spot this.

I've raised an issue to cover it: #101970

Is it ok to leave the summary as is, because we'll have to restore them when fixing the issue. Plus it makes it easier to spot them when we fix it.

kunalspathak

LGTM

JIT ARM64-SVE: Add BitwiseClear and BooleanNot

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dotnet-issue-labeler bot added area-System.Runtime.Intrinsics new-api-needs-documentation labels May 3, 2024

dotnet-policy-service bot added the community-contribution Indicates that the PR has been added by a community member label May 3, 2024

a74nh commented May 3, 2024

View reviewed changes

a74nh marked this pull request as ready for review May 3, 2024 16:31

kunalspathak added the arm-sve Work related to arm64 SVE/SVE2 support label May 3, 2024

kunalspathak mentioned this pull request May 3, 2024

Arm64: Implement SVE APIs #99957

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kunalspathak requested changes May 3, 2024

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kunalspathak approved these changes May 7, 2024

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kunalspathak merged commit 40e664e into dotnet:main May 7, 2024
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michaelgsharp pushed a commit to michaelgsharp/runtime that referenced this pull request May 9, 2024

JIT ARM64-SVE: Add BitwiseClear and BooleanNot (dotnet#101853)

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Ruihan-Yin pushed a commit to Ruihan-Yin/runtime that referenced this pull request May 30, 2024

JIT ARM64-SVE: Add BitwiseClear and BooleanNot (dotnet#101853)

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JIT ARM64-SVE: Add BitwiseClear and BooleanNot #101853

JIT ARM64-SVE: Add BitwiseClear and BooleanNot #101853

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JIT ARM64-SVE: Add BitwiseClear and BooleanNot #101853

JIT ARM64-SVE: Add BitwiseClear and BooleanNot #101853

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