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Arm64: Add AddAcross Codegen and Tests. #1093

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TamarChristinaArm
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Hi All,

This completes the Addv implementation.

As discussed I've changed the intrinsics to return a Vector so the RA is able to pic the correct register file.

The disassembly is a bit misleading though:

G_M48057_IG04:
        3DC00BB0          ldr     q16, [fp,#32]
        4EB1BA10          addv    v16.4s, v16.4s
        3D8007B0          str     q16, [fp,#16] // [V02 tmp1]
        3DC007B0          ldr     q16, [fp,#16] // [V02 tmp1]
        4EB01E00          mov     v0.16b, v16.16b

Would it make sense to try to change the disassembler to emit

addv    s16, v16.4s

here?

/cc @CarolEidt @tannergooding @echesakovMSFT

@Dotnet-GitSync-Bot Dotnet-GitSync-Bot added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Dec 20, 2019
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@CarolEidt CarolEidt left a comment

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Aside from the one type mismatch @echesakovMSFT pointed out, this LGTM

@TamarChristinaArm TamarChristinaArm force-pushed the implement-arm64-addacross branch from d89c314 to 29eb515 Compare December 31, 2019 10:59
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@echesakov echesakov left a comment

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Looks Good

@echesakov
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win-arm failures are not related to these changes and tracked by #1097

@echesakov echesakov merged commit 8858705 into dotnet:master Dec 31, 2019
@ghost ghost locked as resolved and limited conversation to collaborators Dec 11, 2020
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4 participants