Lowering subset of Vector512 methods for avx512.

[DeepakRajendrakumaran]

This PR addresses the following issue : #80814. It currently has the following support.

Vector512.Load()
Vector512.LoadUnsafe()
Vector512.LoadAligned()
Vector512.LoadAlignedNonTemporal()

Vector512.Store()
Vector512.StoreUnsafe()
Vector512.StoreAligned()
Vector512.StoreAlignedNonTemporal()

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Issue Details

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Author:	DeepakRajendrakumaran
Assignees:	-
Labels:	area-CodeGen-coreclr, community-contribution
Milestone:	-

[BruceForstall]

@DeepakRajendrakumaran Does this address a specific GitHub issue (work item) that is listed on #77034?

[DeepakRajendrakumaran]

@DeepakRajendrakumaran Does this address a specific GitHub issue (work item) that is listed on #77034?

This PR addresses part of this - #80814

I plan to add a few more including store here. So, this will have further commits this week. Will move this PR from draft -> live once it's ready for review

[tannergooding]

Looks to be a small TP regression, likely due to the more case statements and that changing how the jump tables or other dispatch can work.

It's possible some of these would be better via flags or something long term, but I don' think that's something we strictly have to handle as part of this PR.

Might be good as a separate PR and then taking this PR after if the up to +0.03% is a concern.

[tannergooding]

CC. @dotnet/jit-contrib, @dotnet/avx512-contrib for secondary review and merging

[BruceForstall]

Looks to be a small TP regression, likely due to the more case statements and that changing how the jump tables or other dispatch can work.

Maybe because all the if (size == 64) checks come first and are always false / "not taken"?

[DeepakRajendrakumaran]

Looks to be a small TP regression, likely due to the more case statements and that changing how the jump tables or other dispatch can work.

Maybe because all the if (size == 64) checks come first and are always false / "not taken"?

I can switch this around and check again. I'll have another set of methods to lower pretty soon and this should be easy to check

[BruceForstall]

Note that our SPMI throughput measurements are based on collections taken on the Helix test machines. I think these are all AVX-512 capable machines so presumably hit the AVX2 paths. Seems like that's the one to optimize for in general, based on expected customer installed base.

Also note that TP measurements are done using a native JIT built without PGO. Theoretically, if all the code paths were hit in the training scenarios (unlikely), the native compiler would rearrange the order of branches.

Final note: the TP measurements are instruction counts, not cycle counts. It's as close a proxy to time-based throughput as we can reliably get.

[DeepakRajendrakumaran]

Note that our SPMI throughput measurements are based on collections taken on the Helix test machines. I think these are all AVX-512 capable machines so presumably hit the AVX2 paths. Seems like that's the one to optimize for in general, based on expected customer installed base.

Also note that TP measurements are done using a native JIT built without PGO. Theoretically, if all the code paths were hit in the training scenarios (unlikely), the native compiler would rearrange the order of branches.

Final note: the TP measurements are instruction counts, not cycle counts. It's as close a proxy to time-based throughput as we can reliably get.

I flipped the condition. For eg.