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[NativeAOT] Use 8.1 atomics, if available, in RhpCheckedXchg/RhpCheckedLockCmpXchg #85283

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merged 5 commits into from
Apr 28, 2023

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@VSadov VSadov commented Apr 25, 2023

We could, in theory, test for presence of LSE instructions dynamically, - set a global flag early on, and check it when need to do an object exchange. I am not sure if potential improvement could be more than the cost of the check.

When it is guaranteed that LSE is present, it is a trivial change.

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ghost commented Apr 25, 2023

Tagging subscribers to this area: @agocke, @MichalStrehovsky, @jkotas
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We could, in theory, test for presence of LSE instructions dynamically, - set a global flag early on, and check it when need to do an object exchange. I am not sure if potential improvement could be more than the cost of the check.

When it is guaranteed that LSE is present, it is a trivial change.

Author: VSadov
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area-NativeAOT-coreclr

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@VSadov VSadov requested a review from jkotas April 25, 2023 00:08
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jkotas commented Apr 25, 2023

I am not sure if potential improvement could be more than the cost of the check.

The improvement is more than the cost of the check based on what we have seen earlier. We use the dynamic check for standard CoreCLR:

if (g_arm64_atomics_present)

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VSadov commented Apr 25, 2023

I have added a dynamic check when LSE_INSTRUCTIONS_ENABLED_BY_DEFAULT is not set.

@@ -81,6 +81,10 @@ TrapThreadsFlags_TrapThreads equ 2
TrapThreadsFlags_AbortInProgress_Bit equ 0
TrapThreadsFlags_TrapThreads_Bit equ 1

;; Bit position for the ARM64IntrinsicConstants_Atomics flags, to be used with tbz / tbnz instructions
;; ARM64IntrinsicConstants_Atomics = 0x0080
ARM64_ATOMICS_FEATURE_FLAG_BIT equ 7
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Can we validate that the value of this constant matches the C++ version?

This looks very likely to get forgotten if we ever shuffle the enum for whatever reason.

We have a mechanism for compile-time validation of these things in AsmOffsets.h. It's not an offset per se, but this is used to ensure MAX_STRING_LENGTH agree, etc.

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I'll put this into offsets (with appropriate check).

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@VSadov VSadov Apr 27, 2023

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ARM64_ATOMICS_FEATURE_FLAG_BIT is in the AsmOffsets.h now and there is an assert that couples it with ARM64IntrinsicConstants_Atomics

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VSadov commented Apr 26, 2023

hmm arm64 asm on linux is not happy about LSE instructions. I wonder if LSE can be enabled locally

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VSadov commented Apr 26, 2023

/azp run runtime-extra-platforms

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@@ -230,12 +230,21 @@ int DwarfInstructions<A, R>::stepWithDwarf(A &addressSpace, pint_t pc,
p &= ~0xfULL;
// CFA is the bottom of the current stack frame.
for (; p < cfa; p += 16) {
#ifdef __GNUC__
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clang defines __GNUC__ for compat, so this is #if 1 for all practical purposes.

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hmm, that is not very useful. Is there a way to detect GCC, or do we ever compile this file with GCC?

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GCC does not document mte as something it would accept.

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We can just put #if 0 around this whole block for now. We do not need support for mtag in our copy of libunwind.

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@VSadov VSadov Apr 27, 2023

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Although it might be that both clang and gcc support mte:

Trying use it in godbolt

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Is there a way to detect GCC

We can instead use #ifdef __llvm__ (if it is really needed)

Please reference the commit modifying external source in src/native/external/llvm-libunwind-version.txt.

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The problem is with older versions of llvm that do not understand this extension at all.

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Maybe just replace it with assert(false) until we have to support ‘mte’?
We’d have to switch to compiler that supports it by then.

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This is a dead code as we are setting stage2 to false: https://github.com/dotnet/runtime/pull/85179/files#diff-342f897208801d38daad0d3b917fae03bdcc260357ebfc132231be828977dae0 and this code is under if (stage2 && ..) condition, so we can just skip this branch from compilation as @jkotas has done in #85431.

@VSadov VSadov merged commit 42e397b into dotnet:main Apr 28, 2023
@VSadov VSadov deleted the bar81 branch April 28, 2023 13:33
@ghost ghost locked as resolved and limited conversation to collaborators May 28, 2023
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4 participants