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[Mono] Intrinsify Vector128.Create on Arm64 for mini JIT #85404

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merged 3 commits into from
Apr 28, 2023
Merged

[Mono] Intrinsify Vector128.Create on Arm64 for mini JIT #85404

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0a0d8ad
Intrinsify Vector128.Create
fanyang-mono Apr 26, 2023
49cffbd
Hopefully fix the test failure
fanyang-mono Apr 27, 2023
3cb4c0a
Increase maximal instruction length
fanyang-mono Apr 28, 2023
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2 changes: 1 addition & 1 deletion src/mono/mono/mini/mini-arm64.c
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Original file line number Diff line number Diff line change
Expand Up @@ -4041,7 +4041,7 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
}
break;
}
// Enable this when adding support for Narrow and enable support for Create at the same time
// This requires Vector64 SIMD support
// case OP_XCONCAT:
// arm_neon_ext_16b(code, dreg, sreg1, sreg2, 8);
// break;
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12 changes: 7 additions & 5 deletions src/mono/mono/mini/simd-intrinsics.c
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Expand Up @@ -1349,12 +1349,8 @@ emit_sri_vector (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsi
if (!(!strcmp (m_class_get_name (cmethod->klass), "Vector128") || !strcmp (m_class_get_name (cmethod->klass), "Vector")))
return NULL;
switch (id) {
case SN_Create:
case SN_GetLower:
case SN_GetUpper:
case SN_Shuffle:
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These were removed as well, as SN_Shuffle hasn't been supported by LLVM either. SN_ToVector128 and SN_ToVector128Unsafe were Vector64 API's and didn't apply to Vector128.

case SN_ToVector128:
case SN_ToVector128Unsafe:
return NULL;
default:
break;
Expand Down Expand Up @@ -1569,8 +1565,14 @@ emit_sri_vector (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsi
MonoInst* ins = emit_simd_ins (cfg, klass, type_to_expand_op (etype->type), args [0]->dreg, -1);
ins->inst_c1 = arg0_type;
return ins;
} else if (is_create_from_half_vectors_overload (fsig))
} else if (is_create_from_half_vectors_overload (fsig)) {
#if defined(TARGET_ARM64)
// Require Vector64 SIMD support
if (!COMPILE_LLVM (cfg))
return NULL;
#endif
return emit_simd_ins (cfg, klass, OP_XCONCAT, args [0]->dreg, args [1]->dreg);
}
else if (is_elementwise_create_overload (fsig, etype))
return emit_vector_create_elementwise (cfg, fsig, fsig->ret, arg0_type, args);
break;
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