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v1.6.0
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@dpretet dpretet released this 28 Feb 20:42
· 44 commits to master since this release
v1.6.0
b907946

Misc. updates for this new iteration:

  • pass to python 3 and clean the code
  • rely in python template engine for SystemVerilog and cpp generated files
  • add more information in README
  • move to GitHub Actions and enhance the regression scope
  • start a first support of Verilator. Execution is OK, needs to enhance cpp template and prepare a svut.h to bring equivalent SystemVerilog macros in C++ world. Will be probably minimal and based on existing unit test flow
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