Skip to content

Commit

Permalink
SCPI doc update
Browse files Browse the repository at this point in the history
  • Loading branch information
@prasimix
prasimix committed Jun 26, 2021
1 parent e8e76dc commit c821145
Show file tree
Hide file tree
Showing 14 changed files with 436 additions and 135 deletions.
416 changes: 325 additions & 91 deletions docs/SCPI reference guide/Commands/EEZ BB3 SCPI reference 10 - Programming examples.html
View file

Large diffs are not rendered by default.

8 changes: 4 additions & 4 deletions docs/SCPI reference guide/Commands/EEZ BB3 SCPI reference 3 - registers and queue.html
View file
Original file line number Diff line number Diff line change
Expand Up @@ -57,7 +57,7 @@
</a> </div>
<p class="Caption">Fig. 1: Summary of status structure registers</p>
</div>
<p class="Heading_2">3.1. <a name="__RefNumPara__5224_1776698109"></a><a name="__RefHeading__5462_1776152697"></a><a name="std_even_stat_reg"></a>Standard Event Status Register<a name="__RefNumPara__5224_1776698109"></a><a name="__RefHeading__5462_1776152697"></a></p>
<p class="Heading_2">3.1. <a name="__RefHeading__5462_1776152697"></a><a name="__RefNumPara__5224_1776698109"></a><a name="std_even_stat_reg"></a>Standard Event Status Register<a name="__RefHeading__5462_1776152697"></a><a name="__RefNumPara__5224_1776698109"></a></p>
<p>An status register group is consist of Condition, Event and Enable registers (see Fig.&#160;1):</p>
<ul>
<li class="List_1_Start" style="text-indent: 0; list-style-type: disc;">The Condition register is a read-only register, which holds the live (unlatched) operational status of the instrument. Reading the Condition register does not clear it.</li>
Expand Down Expand Up @@ -202,7 +202,7 @@
</tr>
</table>
<p>&#160;</p>
<p class="Heading_2">3.2. <a name="__RefNumPara__7055_1776698109"></a><a name="__RefHeading__6866_1044300784"></a><a name="stat_byte_reg"></a>Status Byte Register<a name="__RefNumPara__7055_1776698109"></a><a name="__RefHeading__6866_1044300784"></a></p>
<p class="Heading_2">3.2. <a name="__RefHeading__6866_1044300784"></a><a name="__RefNumPara__7055_1776698109"></a><a name="stat_byte_reg"></a>Status Byte Register<a name="__RefHeading__6866_1044300784"></a><a name="__RefNumPara__7055_1776698109"></a></p>
<p>The Status Byte summary register reports conditions from the other status registers (see Fig.&#160;1). Query data that is waiting in the BB3’s output buffer is immediately reported through the &quot;Message Available&quot; (MAV) bit (bit 4) of the Status Byte register. Bits in the summary register are NOT latched. Clearing an event register will clear the corresponding bits in the Status Byte summary register. Reading all messages in the output buffer, including any pending queries, will clear the message available bit (MAV).</p>
<p>The Status Byte summary register is cleared when the *CLS (clear status) command has been executed.</p>
<p>The Status Byte enable register (request service) is cleared when the *SRE 0 command has been executed.</p>
Expand Down Expand Up @@ -890,7 +890,7 @@
</table>
<p>&#160;</p>
<p>The Questionable Status Enable register is cleared when the STAT:QUES:ENAB 0 command is executed. The *CLS command can be also used to clear the register.</p>
<p class="Heading_3">3.4.1. <a name="__RefNumPara__35965_1442645923"></a><a name="__RefHeading__17188_670294931"></a><a name="ques_inst_stat_reg"></a>Questionable INSTrument Status register<a name="__RefNumPara__35965_1442645923"></a><a name="__RefHeading__17188_670294931"></a></p>
<p class="Heading_3">3.4.1. <a name="__RefHeading__17188_670294931"></a><a name="__RefNumPara__35965_1442645923"></a><a name="ques_inst_stat_reg"></a>Questionable INSTrument Status register<a name="__RefHeading__17188_670294931"></a><a name="__RefNumPara__35965_1442645923"></a></p>
<p>Bit definition for QUEStionable INSTrument register:</p>
<p>&#160;</p>
<table style="border-collapse: collapse; background: transparent; width: 169.92mm;">
Expand Down Expand Up @@ -994,7 +994,7 @@
</td>
</tr>
</table>
<p class="Heading_3">3.4.2. <a name="__RefHeading__17192_670294931"></a><a name="__RefNumPara__35967_1442645923"></a><a name="ques_isum_stat_reg"></a>Questionable Instrument SUMmary status register<a name="__RefHeading__17192_670294931"></a><a name="__RefNumPara__35967_1442645923"></a></p>
<p class="Heading_3">3.4.2. <a name="__RefNumPara__35967_1442645923"></a><a name="__RefHeading__17192_670294931"></a><a name="ques_isum_stat_reg"></a>Questionable Instrument SUMmary status register<a name="__RefNumPara__35967_1442645923"></a><a name="__RefHeading__17192_670294931"></a></p>
<p>There are three questionable instrument summary registers, one for each power module output. These registers provide information about voltage and current regulation. </p>
<p>Bit definition for QUEStionable INSTrument SUMmary register:</p>
<p>&#160;</p>
Expand Down
2 changes: 1 addition & 1 deletion docs/SCPI reference guide/Commands/EEZ BB3 SCPI reference 5.15 - SOURce.html
View file
Original file line number Diff line number Diff line change
Expand Up @@ -5260,7 +5260,7 @@
</td>
</tr>
</table>
<p class="Heading_3">5.15.54. <a name="sour_digi_func_shap"></a><a name="sour_digi_func_phas"></a>SOURce:DIGItal[:OUTPut]:FUNCtion:PHASeshift {&lt;phase&gt;}</p>
<p class="Heading_3">5.15.54. <a name="sour_digi_func_phas"></a><a name="sour_digi_func_shap"></a>SOURce:DIGItal[:OUTPut]:FUNCtion:PHASeshift {&lt;phase&gt;}</p>
<table style="border-collapse: collapse; background: transparent; width: 169.92mm;">
<tr style="background: transparent;">
<td style="border-left: 0; border-right: 0; border-top: 0; border-bottom: 0; vertical-align: top; background: transparent; width: 13%;">
Expand Down
13 changes: 12 additions & 1 deletion docs/SCPI reference guide/Commands/EEZ BB3 SCPI reference 5.4 - DISPlay.html
View file
Original file line number Diff line number Diff line change
Expand Up @@ -22,6 +22,7 @@
.cmd_code_Start { text-align: left; margin-top: 1.99mm; font-family: "Courier New"; }
.cmd_code_single { text-align: left; margin-top: 1.99mm; margin-bottom: 1.99mm; font-family: "Courier New"; }
.cmd_root { text-align: left; color: #0066cc; }
.note { font-style: italic; }
.scpi0 { text-align: left; }
.scpi1 { text-align: left; margin-left: 4.99mm; }
.scpi2 { text-align: left; margin-left: 10mm; }
Expand Down Expand Up @@ -283,8 +284,10 @@
<p class="Default_nt2">Description</p>
</td>
<td style="border-left: 0; border-right: 0; border-top: 0; border-bottom: 0; vertical-align: top; background: transparent; width: 87%;">
<p>This query reads screen image data. The image is formatted as a .png file. </p>
<p>This query reads screen image data (i.e. create screenshot). The image is formatted as a .png file. </p>
<p>Use the HCOPy[:IMMediate] or HCOPy:SDUMp[:IMMediate] command to capture screen image and save it as a file on the SD card.</p>
<p>&#160;</p>
<p class="note">An attempt to reads screen image data while DLOG recording is in progress will generate an execution error.</p>
</td>
</tr>
<tr style="background: transparent;">
Expand All @@ -304,6 +307,14 @@
<p class="cmd_code">#&lt;length-digits&gt;&lt;length&gt;&lt;block&gt;</p>
</td>
</tr>
<tr style="background: transparent;">
<td style="border-left: 0; border-right: 0; border-top: 0; border-bottom: 0; vertical-align: top; background: transparent; width: 13%;">
<p class="Default_nt2">&#160;</p>
</td>
<td style="border-left: 0; border-right: 0; border-top: 0; border-bottom: 0; vertical-align: top; background: transparent; width: 87%;">
<p class="cmd_code">-200,&quot;Execution error&quot;</p>
</td>
</tr>
<tr style="background: transparent;">
<td style="border-left: 0; border-right: 0; border-top: 0; border-bottom: 0; vertical-align: top; background: transparent; width: 13%;">
<p class="Default_nt2">Related Commands</p>
Expand Down
Loading

0 comments on commit c821145

Please sign in to comment.