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fix wrong cell name #52

Merged
merged 2 commits into from
Mar 22, 2022
Merged

fix wrong cell name #52

merged 2 commits into from
Mar 22, 2022

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kareefardi
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In gpio_control_block, data_delay_* cells should be sky130_fd_sc_hd__dlygate4sd2_1 instead of sky130_fd_sc_hd__dlygate4sd2

@kareefardi
fix wrong cell name
8e02ea7 
`sky130_fd_sc_hd__dlygate4sd2` is called `sky130_fd_sc_hd__dlygate4sd2_1`
@kareefardi
Apply automatic changes to Manifest and README.rst
374deae
RTimothyEdwards
RTimothyEdwards approved these changes Mar 22, 2022
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Oops, sorry. Yes, this is the right gate name.

@jeffdi jeffdi merged commit e93c6cc into main Mar 22, 2022
@jeffdi jeffdi deleted the kareefardi-patch-1 branch March 22, 2022 15:29
M0stafaRady pushed a commit that referenced this pull request Sep 30, 2022
@jeffdi
Merge pull request #52 from efabless/kareefardi-patch-1
5b962a3 
fix wrong cell name
@RTimothyEdwards RTimothyEdwards added error Something isn't working RTL Verilog source code changed labels Oct 4, 2022
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@RTimothyEdwards RTimothyEdwards RTimothyEdwards approved these changes

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@kareefardi @RTimothyEdwards @jeffdi