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esp32c3: Add example for the RTC Watchdog Timer driver
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
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gustavonihei committed Aug 3, 2022
1 parent 0015002 commit f5ac448
Showing 1 changed file with 69 additions and 0 deletions.
69 changes: 69 additions & 0 deletions esp32c3-hal/examples/rtc_watchdog.rs
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//! This demos the RTC Watchdog Timer (RWDT).
//! The RWDT is initially configured to trigger an interrupt after a given timeout.
//! Then, upon expiration, the RWDT is restarted and then reconfigured to reset both the main
//! system and the RTC.

#![no_std]
#![no_main]

use core::cell::RefCell;

use bare_metal::Mutex;

use esp32c3_hal::{
clock::ClockControl,
interrupt,
pac::{self, Peripherals},
prelude::*,
Rtc,
};
use esp_hal_common::Rwdt;
use panic_halt as _;
use riscv_rt::entry;

static mut RWDT: Mutex<RefCell<Option<Rwdt>>> = Mutex::new(RefCell::new(None));

#[entry]
fn main() -> ! {
let peripherals = Peripherals::take().unwrap();
let system = peripherals.SYSTEM.split();
let _clocks = ClockControl::boot_defaults(system.clock_control).freeze();

let mut rtc = Rtc::new(peripherals.RTC_CNTL);

// Disable watchdog timers
rtc.swd.disable();
rtc.rwdt.disable();

rtc.rwdt.start(2000u64.millis());
rtc.rwdt.listen();

interrupt::enable(pac::Interrupt::RTC_CORE, interrupt::Priority::Priority1).unwrap();

riscv::interrupt::free(|_cs| unsafe {
RWDT.get_mut().replace(Some(rtc.rwdt));
});

unsafe {
riscv::interrupt::enable();
}

loop {}
}

#[interrupt]
fn RTC_CORE() {
riscv::interrupt::free(|cs| unsafe {
esp_println::println!("RWDT Interrupt");

let mut rwdt = RWDT.borrow(*cs).borrow_mut();
let rwdt = rwdt.as_mut().unwrap();

rwdt.clear_interrupt();

esp_println::println!("Restarting in 5 seconds...");

rwdt.start(5000u64.millis());
rwdt.unlisten();
});
}

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