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Xtensa vectored interrupts #103

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Jul 25, 2022
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ea29a9b
Xtensa interrupt vectoring: peripheral source
MabezDev Jun 22, 2022
a450214
Xtensa interrupt vectoring: CPU & EDGE
MabezDev Jun 23, 2022
004659d
Xtensa interrupt vectoring: Priority
MabezDev Jun 23, 2022
465b2d3
support CPU interrupts, using patch xtensa-lx-rt
MabezDev Jul 14, 2022
f677dd4
Update example
MabezDev Jul 14, 2022
46b3591
Add support & examples for the s2 & s3 too
MabezDev Jul 14, 2022
6fa4af8
Fix formatting and missing imports
MabezDev Jul 14, 2022
9a516d1
Run interrupt handling in ram, optionally run the vector handler in r…
MabezDev Jul 14, 2022
430de39
Use xtensa_lx::Mutex CS when enabling interrupts
MabezDev Jul 14, 2022
494d16c
Run clippy on each target
MabezDev Jun 24, 2022
4068220
Remove redundant features
MabezDev Jun 24, 2022
369dee2
Fix C3 builds
MabezDev Jul 14, 2022
b647534
make enable unsafe. Add note about preallocated interrupts in vectore…
MabezDev Jul 14, 2022
11f2342
Remove `INTERRUPT_LEVELS` static
MabezDev Jul 20, 2022
af023a6
Allow raw interrupts on levels 4-7, whilst also supporting vectoring …
MabezDev Jul 20, 2022
5692ffd
rename core number features
MabezDev Jul 20, 2022
b882703
Fix examples and formatting
MabezDev Jul 20, 2022
6c7fda9
use xtensa-lx-rt release, update pacs
MabezDev Jul 20, 2022
b1f0cc5
Support passing the trap frame into interrupt handlers
MabezDev Jul 22, 2022
b30b3eb
cfg away the #[interrupt] macro when not using vectoring
MabezDev Jul 22, 2022
1eb70a0
rename enable to map
MabezDev Jul 22, 2022
5bf76c5
export vectored functions
MabezDev Jul 22, 2022
67ba5f0
Update all examples to use vectored interrupts
MabezDev Jul 22, 2022
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35 changes: 27 additions & 8 deletions .github/workflows/ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -54,25 +54,44 @@ jobs:
# The `hello_rgb` example requires the `smartled` feature to be enabled
args: -Zbuild-std=core --examples --manifest-path=${{ matrix.chip }}-hal/Cargo.toml --target=xtensa-${{ matrix.chip }}-none-elf --features=smartled

clippy:
name: Clippy
clippy-riscv:
name: Run clippy on RISC-V builds
runs-on: ubuntu-latest
strategy:
fail-fast: false
matrix:
chip: [esp32, esp32c3, esp32s2, esp32s3]
toolchain: [stable, nightly]
steps:
- uses: actions/checkout@v2
- uses: actions-rs/toolchain@v1
with:
profile: minimal
toolchain: nightly
default: true
target: riscv32imc-unknown-none-elf
toolchain: ${{ matrix.toolchain }}
components: clippy
default: true
- uses: Swatinem/rust-cache@v1
- uses: actions-rs/cargo@v1
with:
command: clippy
args: --manifest-path=esp32c3-hal/Cargo.toml --target=riscv32imc-unknown-none-elf -- --no-deps -D warnings --A clippy::too-many-arguments --A clippy::module-inception

clippy-xtensa:
name: Run clippy on Xtensa builds
runs-on: ubuntu-latest
strategy:
fail-fast: false
matrix:
chip: [esp32, esp32s2, esp32s3]
steps:
- uses: actions/checkout@v2
- uses: esp-rs/xtensa-toolchain@v1.2
with:
default: true
ldproxy: false
buildtargets: ${{ matrix.chip }}
- uses: Swatinem/rust-cache@v1
- uses: actions-rs/cargo@v1
with:
command: clippy
# I find `clippy::too-many-arguments` to be rather rather arbitrary.
# As for `clippy::module-inception`... don't tell me what to do ;)
args: --manifest-path=${{ matrix.chip }}-hal/Cargo.toml -- --no-deps -D warnings --A clippy::too-many-arguments --A clippy::module-inception
args: -Zbuild-std=core --manifest-path=${{ matrix.chip }}-hal/Cargo.toml --target=xtensa-${{ matrix.chip }}-none-elf -- --no-deps -D warnings --A clippy::too-many-arguments --A clippy::module-inception
17 changes: 5 additions & 12 deletions .vscode/settings.json
Original file line number Diff line number Diff line change
@@ -1,17 +1,12 @@
{
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"editor.formatOnSave": true,

"rust-analyzer.cargo.buildScripts.enable": true,
"rust-analyzer.cargo.noDefaultFeatures": true,

"rust-analyzer.checkOnSave.allTargets": false,

"rust-analyzer.imports.granularity.enforce": true,
"rust-analyzer.imports.granularity.group": "crate",

"rust-analyzer.procMacro.attributes.enable": false,
"rust-analyzer.procMacro.enable": true,

// -----------------------------------------------------------------------
// Since we have to handle multiple toolchains AND multiple targets, we
// we need to give Rust Analyzer some directions.
Expand All @@ -20,16 +15,14 @@
// developing for. This will propagate to the `esp-hal-common` crate too,
// as it is a dependency. Changing target/project requires reloading
// Rust Analyzer.

// "rust-analyzer.cargo.target": "xtensa-esp32-none-elf",
"rust-analyzer.cargo.target": "riscv32imc-unknown-none-elf",
"rust-analyzer.cargo.target": "xtensa-esp32-none-elf",
// "rust-analyzer.cargo.target": "riscv32imc-unknown-none-elf",
// "rust-analyzer.cargo.target": "xtensa-esp32s2-none-elf",
// "rust-analyzer.cargo.target": "xtensa-esp32s3-none-elf",

"rust-analyzer.linkedProjects": [
// "esp32-hal/Cargo.toml",
"esp32c3-hal/Cargo.toml",
"esp32-hal/Cargo.toml",
// "esp32c3-hal/Cargo.toml",
// "esp32s2-hal/Cargo.toml",
// "esp32s3-hal/Cargo.toml",
],
}
}
26 changes: 11 additions & 15 deletions esp-hal-common/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -38,27 +38,21 @@ smart-leds-trait = { version = "0.2.1", optional = true }
# Each supported device MUST have its PAC included below along with a
# corresponding feature. We rename the PAC packages because we cannot
# have dependencies and features with the same names.
#
# Please note: for now we use git-dependencies from the `with_source` branch however we pin the dependency
# to specific commits.
esp32_pac = { package = "esp32", git = "https://github.com/esp-rs/esp-pacs.git", rev = "148dbb843cba3c311364aa994b8f3f773d15b04f", optional = true }
esp32c3_pac = { package = "esp32c3", git = "https://github.com/esp-rs/esp-pacs.git", rev = "148dbb843cba3c311364aa994b8f3f773d15b04f", optional = true }
esp32s2_pac = { package = "esp32s2", git = "https://github.com/esp-rs/esp-pacs.git", rev = "148dbb843cba3c311364aa994b8f3f773d15b04f", optional = true }
esp32s3_pac = { package = "esp32s3", git = "https://github.com/esp-rs/esp-pacs.git", rev = "148dbb843cba3c311364aa994b8f3f773d15b04f", optional = true }
esp32_pac = { package = "esp32", git = "https://github.com/esp-rs/esp-pacs.git", branch = "with_source", optional = true }
esp32c3_pac = { package = "esp32c3", git = "https://github.com/esp-rs/esp-pacs.git", branch = "with_source", optional = true }
esp32s2_pac = { package = "esp32s2", git = "https://github.com/esp-rs/esp-pacs.git", branch = "with_source", optional = true }
esp32s3_pac = { package = "esp32s3", git = "https://github.com/esp-rs/esp-pacs.git", branch = "with_source", optional = true }

[features]
esp32 = [ "esp32_pac/rt", "xtensa", "dual_core", "xtensa-lx-rt/esp32", "xtensa-lx/esp32"]
esp32c3 = ["esp32c3_pac/rt", "risc_v", "single_core"]
esp32s2 = ["esp32s2_pac/rt", "xtensa", "single_core", "xtensa-lx-rt/esp32s2", "xtensa-lx/esp32s2"]
esp32s3 = ["esp32s3_pac/rt", "xtensa", "dual_core", "xtensa-lx-rt/esp32s3", "xtensa-lx/esp32s3"]
esp32 = ["esp32_pac/rt" , "procmacros/xtensa", "multi_core" , "xtensa-lx-rt/esp32", "xtensa-lx/esp32"]
esp32c3 = ["esp32c3_pac/rt", "procmacros/riscv" , "single_core", "riscv", "riscv-atomic-emulation-trap"]
esp32s2 = ["esp32s2_pac/rt", "procmacros/xtensa", "single_core", "xtensa-lx-rt/esp32s2", "xtensa-lx/esp32s2"]
esp32s3 = ["esp32s3_pac/rt", "procmacros/xtensa", "multi_core" , "xtensa-lx-rt/esp32s3", "xtensa-lx/esp32s3"]

# Architecture (should not be enabled directly, but instead by a PAC's feature)
risc_v = ["riscv", "riscv-atomic-emulation-trap"]
xtensa = ["procmacros/rtc_slow"]

# Core Count (should not be enabled directly, but instead by a PAC's feature)
single_core = []
dual_core = []
multi_core = []

# To support `ufmt`
ufmt = ["ufmt-write"]
Expand All @@ -68,3 +62,5 @@ smartled = ["smart-leds-trait"]

# Implement the `embedded-hal==1.0.0-alpha.x` traits
eh1 = ["embedded-hal-1"]
# To use vectored interrupts (calling the handlers defined in the PAC)
vectored = ["procmacros/interrupt"]
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