[Xtensa] Fix atomic swap for 8/16 bit operands.

espressif · Sep 28, 2023 · 2a920d9 · 2a920d9
1 parent f0b03b4
commit 2a920d9
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/llvm/lib/Target/Xtensa/XtensaISelLowering.cpp b/llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
@@ -2416,7 +2416,7 @@ XtensaTargetLowering::emitAtomicSwap(MachineInstr &MI, MachineBasicBlock *BB,
   unsigned R8 = MRI.createVirtualRegister(RC);
 
   BuildMI(*BB, St, DL, TII.get(Xtensa::SSR)).addReg(BitOffs);
-  BuildMI(*BB, St, DL, TII.get(Xtensa::SLL), R8).addReg(AtomValLoop);
+  BuildMI(*BB, St, DL, TII.get(Xtensa::SRL), R8).addReg(AtomValLoop);
 
   if (isByteOperand) {
     BuildMI(*BB, St, DL, TII.get(Xtensa::SEXT), Res.getReg())