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Fixes for real hardware.
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@fvdhoef
fvdhoef committed Feb 3, 2024
1 parent ef628bd commit 0748fc0
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Showing 12 changed files with 3,515 additions and 2,578 deletions.
4 changes: 4 additions & 0 deletions System/emulator/Shared/AqUartProtocol.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -343,6 +343,8 @@ void AqUartProtocol::receivedByte(uint8_t data) {
return;
}

// printf("AqUartProtocol::receivedByte %02X\n", data);

rxBuf[rxBufIdx] = data;
if (rxBufIdx < sizeof(rxBuf) - 1) {
rxBufIdx++;
Expand All @@ -356,6 +358,7 @@ void AqUartProtocol::receivedByte(uint8_t data) {
// Close any open descriptors
DBGF("RESET\n");
cmdReset();
rxBufIdx = 0;
break;
}
case ESPCMD_VERSION: {
Expand Down Expand Up @@ -563,6 +566,7 @@ void AqUartProtocol::receivedByte(uint8_t data) {
}
default: {
DBGF("Invalid command: 0x%02X\n", cmd);
rxBufIdx = 0;
break;
}
}
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2 changes: 1 addition & 1 deletion System/emulator/Shared/VFS/EspVFS.cpp
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Expand Up @@ -75,7 +75,7 @@ int EspVFS::open(uint8_t flags, const std::string &_path) {
}
auto path = _path.substr(idx);

// printf("esp_open(%u, \"%s\")\n", flags, path);
// printf("esp_open(%u, \"%s\")\n", flags, path.c_str());

if (strcasecmp(path.c_str(), fn_com) == 0) {
EspSettingsConsole::instance().newSession();
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3,374 changes: 2,093 additions & 1,281 deletions System/emulator/romfs_contents.h
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4 changes: 3 additions & 1 deletion System/fpga/src/convert_rom.sh
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@@ -1,2 +1,4 @@
#!/bin/sh
./genrom.py ../../emulator/aquarius.rom rom.v
set -e
make -C ../../rom_src/fpgarom
./genrom.py ../../rom_src/fpgarom/zout/fpgarom.cim rom.v
2,546 changes: 1,273 additions & 1,273 deletions System/fpga/src/rom.v
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58 changes: 49 additions & 9 deletions System/fpga/src/sim/tb.v
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Original file line number Diff line number Diff line change
Expand Up @@ -280,12 +280,31 @@ module tb();
@(posedge phi);
@(posedge phi);

iowr(16'hF3, 8'h33);
memwr(16'hFFFF, 8'h01);
memwr(16'hFFFE, 8'h02);

memwr(16'hC000, 8'h42);
memwr(16'hD000, 8'h42);
memwr(16'hE000, 8'h42);
memwr(16'hF000, 8'h42);
memwr(16'hF800, 8'h42);

memrd(16'hC000);
memrd(16'hD000);
memrd(16'hE000);
memrd(16'hF000);
memrd(16'hF800);

memrd(16'hFFFF);
memrd(16'hFFFE);


iowr(16'hF4, 8'h80);
@(posedge phi);
@(posedge phi);
@(posedge phi);
@(posedge phi);
spi_ssel_n_r <= 1'b0;
spi_tx(8'h12);
spi_tx(8'hA5);
spi_ssel_n_r <= 1'b1;

@(posedge phi);
@(posedge phi);
@(posedge phi);
Expand All @@ -298,13 +317,34 @@ module tb();
@(posedge phi);
@(posedge phi);
@(posedge phi);
iowr(16'hF5, 8'h01);


// @(posedge phi);
// spi_ssel_n_r <= 1'b0;
// spi_tx(8'h12);
// spi_tx(8'hA5);
// spi_ssel_n_r <= 1'b1;

// @(posedge phi);
// @(posedge phi);
// @(posedge phi);
// @(posedge phi);
// @(posedge phi);
// @(posedge phi);
// @(posedge phi);
// @(posedge phi);
// @(posedge phi);
// @(posedge phi);
// @(posedge phi);
// @(posedge phi);

iord(16'h00FA);
// iord(16'h00FA);

iord(16'h00FA);
// iord(16'h00FA);

// iowr(16'hEC, 8'd255);
iowr(16'hEC, 8'd128);
// // iowr(16'hEC, 8'd255);
// iowr(16'hEC, 8'd128);
// iowr(16'hEC, 8'd0);

// iowr(16'hE0, 8'd06);
Expand Down
81 changes: 81 additions & 0 deletions System/fpga/src/sim/tb_bus.gtkw
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@@ -0,0 +1,81 @@
[*]
[*] GTKWave Analyzer v3.4.0 (w)1999-2022 BSI
[*] Sat Feb 3 10:26:06 2024
[*]
[dumpfile] "tb.vcd"
[dumpfile_mtime] "Sat Feb 3 10:25:32 2024"
[dumpfile_size] 70377
[savefile] "tb_bus.gtkw"
[timestart] 0
[size] 1712 1285
[pos] 78 29
*-22.000000 6880000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[markername] AA
[markername] BB
[markername] CC
[markername] DD
[markername] EE
[markername] FF
[markername] GG
[markername] HH
[markername] II
[markername] JJ
[markername] KK
[markername] LL
[markername] MM
[markername] NN
[markername] OO
[markername] PP
[markername] QQ
[markername] RR
[markername] SS
[markername] TT
[markername] UU
[markername] VV
[markername] WW
[markername] XX
[markername] YY
[markername] ZZ
[treeopen] tb.
[treeopen] tb.top_inst.
[sst_width] 253
[signals_width] 161
[sst_expanded] 1
[sst_vpaned_height] 398
@28
tb.top_inst.ebus_reset_n
tb.top_inst.ebus_phi
@22
tb.top_inst.ebus_a[15:0]
tb.top_inst.ebus_d[7:0]
@28
tb.top_inst.ebus_rd_n
tb.top_inst.ebus_wr_n
tb.top_inst.ebus_mreq_n
tb.top_inst.ebus_iorq_n
tb.top_inst.ebus_int_n
tb.top_inst.ebus_busreq_n
tb.top_inst.ebus_busack_n
@22
tb.top_inst.ebus_ba[4:0]
@28
tb.top_inst.ebus_ram_ce_n
tb.top_inst.ebus_cart_ce_n
tb.top_inst.ebus_ram_we_n
@29
tb.top_inst.esp_tx
tb.top_inst.esp_rx
tb.top_inst.esp_cts
tb.top_inst.esp_rts
@200
-Internal
@22
tb.top_inst.reg_bank0_r[7:0]
tb.top_inst.reg_bank1_r[7:0]
tb.top_inst.reg_bank2_r[7:0]
tb.top_inst.reg_bank3_r[7:0]
@28
tb.top_inst.sel_mem_tram
tb.top_inst.sel_mem_sysram
[pattern_trace] 1
[pattern_trace] 0
20 changes: 9 additions & 11 deletions System/fpga/src/top.v
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Original file line number Diff line number Diff line change
Expand Up @@ -160,9 +160,9 @@ module top(
wire sel_mem_sysram = !ebus_mreq_n && reg_bank_overlay && ebus_a[13:11] == 3'b111; // $3800-$3FFF
wire sel_mem_vram = !ebus_mreq_n && reg_bank_page == 6'd20; // Page 20
wire sel_mem_chram = !ebus_mreq_n && reg_bank_page == 6'd21; // Page 21
wire sel_mem_rom = !ebus_mreq_n && reg_bank_page <= 6'd3 && !sel_mem_sysram; // Page 0-3
wire sel_mem_rom = !ebus_mreq_n && reg_bank_page <= 6'd3; // Page 0-3

assign ebus_ba = sel_mem_sysram ? 5'b0 : reg_bank_page[4:0]; // sysram is always in page 32
assign ebus_ba = reg_bank_page[4:0];

// IO space decoding
wire sel_io_video = !sysctrl_dis_regs_r && !ebus_iorq_n && ebus_a[7:4] == 4'hE;
Expand All @@ -189,12 +189,10 @@ module top(
sel_io_espctrl | sel_io_espdata | sel_io_ay8910 | sel_io_ay8910_2 | sel_io_kbbuf | sel_io_sysctrl |
sel_io_cassette | sel_io_vsync_r_cpm_w | sel_io_printer | sel_io_keyb_r_scramble_w;

wire allow_sel_mem = !ebus_mreq_n && !sel_internal && !sel_mem_sysram && (ebus_wr_n || (!ebus_wr_n && !reg_bank_ro));
wire sel_mem_cart = !ebus_mreq_n && !sel_internal && reg_bank_page[5:2] == 4'b0100; // Page 16-19
wire sel_mem_ram = !ebus_mreq_n && !sel_internal && reg_bank_page[5]; // Page 32-63

wire sel_mem_cart = allow_sel_mem && reg_bank_page[5:2] == 4'b0100; // Page 16-19
wire sel_mem_ram = (allow_sel_mem && reg_bank_page[5]) || sel_mem_sysram; // Page 32-63

assign ebus_ram_we_n = !(!ebus_wr_n && (sel_mem_sysram || (sel_mem_ram && !reg_bank_ro)));
assign ebus_ram_we_n = !(sel_mem_ram && !ebus_wr_n && (!reg_bank_ro || sel_mem_sysram));
assign ebus_ram_ce_n = !sel_mem_ram;
assign ebus_cart_ce_n = !sel_mem_cart;

Expand Down Expand Up @@ -236,10 +234,10 @@ module top(
always @(posedge clk or posedge reset)
if (reset) begin
audio_dac_r <= 8'b0;
reg_bank0_r <= {2'b11, 6'd0};
reg_bank1_r <= {2'b00, 6'd33};
reg_bank2_r <= {2'b00, 6'd34};
reg_bank3_r <= {2'b00, 6'd19};
reg_bank0_r <= {2'b00, 6'd0};
reg_bank1_r <= {2'b00, 6'd0};
reg_bank2_r <= {2'b00, 6'd0};
reg_bank3_r <= {2'b00, 6'd0};
sysctrl_dis_regs_r <= 1'b0;
sysctrl_dis_psgs_r <= 1'b0;
sysctrl_turbo_r <= 1'b0;
Expand Down
Binary file modified System/fpga/top.bit
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2 changes: 1 addition & 1 deletion System/rom_src/generate.sh
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Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ make -C boot
make -C settings
cp settings/build/settings.aqx settings/build/settings

romfsgen/romfsgen.py romfs.bin settings/build/settings boot/zout/boot.bin assets/default.chr assets/latin1b.chr assets/sysrom_s2.bin plusbasic/plusBasic/zout/sysrom.bin
romfsgen/romfsgen.py romfs.bin settings/build/settings boot/zout/boot.bin assets/default.chr assets/latin1b.chr assets/sysrom_s2.bin plusbasic/plusBasic/zout/sysrom.bin plusbasic/plusBasic/zout/ptplay.bin

xxd -i -n romfs_start romfs.bin > ../emulator/romfs_contents.h
sed -i "" 's/unsigned char/static const uint8_t/' ../emulator/romfs_contents.h
Expand Down
2 changes: 1 addition & 1 deletion System/rom_src/plusbasic
Submodule plusbasic updated 19 files
+29 −3 plusBasic/aqplusbas.asm
+3 −0 plusBasic/basic/dispatch.asm
+3 −3 plusBasic/basic/fileio.asm
+1 −0 plusBasic/basic/files.asm
+19 −4 plusBasic/basic/play.asm
+11 −0 plusBasic/basic/plus.asm
+2 −1 plusBasic/basic/tokens.asm
+28 −21 plusBasic/create_rom.py
+1 −1 plusBasic/kernel.asm
+8 −5 plusBasic/plus.inc
+2 −1 plusBasic/pt3player/PTPlayer.asm
+1 −0 plusBasic/pt3player/build.bat
+6 −7 plusBasic/pt3player/main.asm
+ − plusBasic/pt3player/zout/main.cim
+1,274 −1,274 plusBasic/pt3player/zout/main.lst
+3 −5 plusBasic/util.asm
+ − plusBasic/zout/ptplay.bin
+ − plusBasic/zout/sysrom.bin
+ − plusBasic/zout/sysrom_nochr.bin
Binary file modified System/rom_src/romfs.bin
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