0.7.1

- (#156) Correct random distribution for signed variables constrained to negaitve value ranges

Signed-off-by: Matthew Ballance <matt.ballance@gmail.com>

doc/Changelog.md

@@ -1,3 +1,7 @@
+
+## 0.7.1
+- (#156) Correct random distribution for signed variables constrained to negaitve value ranges
+
 ## 0.7.0
 - (#146) Correct an issue with enums and the new constant-expression eval from #132
 

etc/ivpm.info

@@ -1,4 +1,4 @@
 
 name=pyvsc
-version=0.7.0
+version=0.7.1
 

src/vsc/model/solvegroup_swizzler_partsel.py

@@ -17,7 +17,7 @@
 class SolveGroupSwizzlerPartsel(object):
 
     def __init__(self, randstate, solve_info):
-        self.debug = 0
+        self.debug = 1
         self.randstate = randstate
         self.solve_info = solve_info
 
@@ -180,9 +180,13 @@ def create_rand_domain_constraint(self,
                         ExprFieldRefModel(f),
                         BinExprType.Eq,
                         ExprLiteralModel(t_range[0], False, 32)))
-        else: # Multi-value range
+        else:
+            # Determine the max width to use for swizzling. 
+            # max value of abs bounds
+
+            maxval = int(max(abs(t_range[0]), abs(t_range[1])))
+
             d_width = 0
-            maxval = t_range[1]
 
             while maxval > 0:
                 d_width += 1
@@ -191,47 +195,51 @@ def create_rand_domain_constraint(self,
             if self.debug > 0:
                 print("d_width: %d" % d_width)                
 
-    #            bit_pattern = self.randstate.randint(0, (1 << width)-1)
             bit_pattern = self.randstate.randint(t_range[0], t_range[1])
-            max_intervals = 6
+            e = self._build_swizzle_constraints(f, bit_pattern, d_width)
+
+        return e
 
-            if self.debug > 0:            
-                print("bit_pattern: %s" % bin(bit_pattern))
+    def _build_swizzle_constraints(self, f, bit_pattern, d_width):
+        e = []
+        max_intervals = 6
+
+        if self.debug > 0:            
+            print("bit_pattern: %s" % bin(bit_pattern))
+
+        if d_width > max_intervals:
+            interval_w = int(d_width/max_intervals)
 
-            if d_width > max_intervals:
-                interval_w = int(d_width/max_intervals)
+            for i in range(max_intervals):
+                low = i*interval_w
 
-                for i in range(max_intervals):
-                    low = i*interval_w
-
-                    if i+1 == max_intervals:
-                        high = d_width-1
-                        width = d_width-low
-                    else:
-                        high = (i+1)*interval_w-1
-                        width = interval_w
-
-                    if self.debug > 0:
-                        print("%d..%d 0x%08x" % (
-                            low, high, ((bit_pattern >> low) & ((1 << width)-1))))
-                    e.append(ExprBinModel(
-                        ExprPartselectModel(
-                            ExprFieldRefModel(f),
-                            ExprLiteralModel(high, False, 32),
-                            ExprLiteralModel(low, False, 32)),
-                        BinExprType.Eq,
-                        ExprLiteralModel((bit_pattern >> low) & ((1 << width)-1), False, width)
-                        ))
-            else:
-                # Create a per-bit constraint            
-                for i in range(d_width):
-                    e.append(ExprBinModel(
-                        ExprPartselectModel(
-                            ExprFieldRefModel(f),
-                            ExprLiteralModel(i, False, 32)),
-                        BinExprType.Eq,
-                        ExprLiteralModel((bit_pattern >> i) & 1, False, 1)
-                        ))
-
+                if i+1 == max_intervals:
+                    high = d_width-1
+                    width = d_width-low
+                else:
+                    high = (i+1)*interval_w-1
+                    width = interval_w
+
+                if self.debug > 0:
+                    print("%d..%d 0x%08x" % (
+                        low, high, ((bit_pattern >> low) & ((1 << width)-1))))
+                e.append(ExprBinModel(
+                    ExprPartselectModel(
+                        ExprFieldRefModel(f),
+                        ExprLiteralModel(high, False, 32),
+                        ExprLiteralModel(low, False, 32)),
+                    BinExprType.Eq,
+                    ExprLiteralModel((bit_pattern >> low) & ((1 << width)-1), False, width)
+                    ))
+        else:
+            # Create a per-bit constraint            
+            for i in range(d_width):
+                e.append(ExprBinModel(
+                    ExprPartselectModel(
+                        ExprFieldRefModel(f),
+                        ExprLiteralModel(i, False, 32)),
+                    BinExprType.Eq,
+                    ExprLiteralModel((bit_pattern >> i) & 1, False, 1)
+                    ))        
         return e
-    
+

ve/unit/test_random_dist.py

@@ -757,5 +757,27 @@ def c(self):
         self.assertGreater(zero_cnt, 0)
         self.assertGreater(max_cnt, 0)
 
+    def test_signed_8bit_neg_values(self):
 
+        @vsc.randobj
+        class my_cls(object):
+            def __init__(self):
+                self.a = vsc.rand_int8_t()
+
+            @vsc.constraint
+            def a_c(self):
+                self.a <= -100
+
+        bins = [0]*28
+
+        myi = my_cls()
+        for i in range(200):
+            myi.randomize()
+            self.assertLessEqual(myi.a, -100)
+            bins[myi.a+100] += 1
+        print("bins: %s" % str(bins))
+
+        for i,b in enumerate(bins):
+            self.assertNotEqual(b, 0)
+