Merge pull request riscv#226 from ved-rivos/menvcfg_sse

Clarify menvcfg.SSE is 0 then henvcfg.SSE/senvcfg.SSE are read-only zero

src/cfi_backward.adoc

@@ -153,9 +153,11 @@ less than M:
 * 32-bit Zicfiss instructions will revert to their behavior as defined by Zimop.
 * 16-bit Zicfiss instructions will revert to their behavior as defined by Zcmop.
 * The `pte.xwr=010b` encoding in VS/S-stage page tables becomes reserved.
-* The `henvcfg.SSE` and `senvcfg.SSE` fields will read as zero and are read-only.
 * `SSAMOSWAP.W/D` raises an illegal-instruction exception.
 
+When `menvcfg.SSE` is 0, `henvcfg.SSE` and `senvcfg.SSE` fields will are
+read-only zero.
+
 ==== Supervisor Environment Configuration Register (`senvcfg`)
 
 .Supervisor environment configuration register (`senvcfg`)