Remove Q4/Q5 bit shuffling without breaking compatibility #1384
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As an alternative to #1305, this keeps Q4 and Q5 the same but changes the order of Q8.
This is pretty rough for now, but I'm putting it here as a draft to invite discussion, and also to get help for SIMD optimizations for
quantize_row_q8_x.I can't test ARM NEON or CUDA, but AVX2 should work.