Added The Device Modeling Language (DML)

.gitmodules

@@ -431,6 +431,9 @@
 [submodule "vendor/grammars/desktop.tmbundle"]
 	path = vendor/grammars/desktop.tmbundle
 	url = https://github.com/Mailaender/desktop.tmbundle.git
+[submodule "vendor/grammars/device-modeling-language"]
+	path = vendor/grammars/device-modeling-language
+	url = https://github.com/intel/device-modeling-language.git
 [submodule "vendor/grammars/diff.tmbundle"]
 	path = vendor/grammars/diff.tmbundle
 	url = https://github.com/textmate/diff.tmbundle

grammars.yml

@@ -350,6 +350,8 @@ vendor/grammars/denizenscript-grammar:
 - source.denizenscript
 vendor/grammars/desktop.tmbundle:
 - source.desktop
+vendor/grammars/device-modeling-language:
+- source.dml
 vendor/grammars/diff.tmbundle:
 - source.diff
 vendor/grammars/dm-syntax:

lib/linguist/heuristics.yml

@@ -195,6 +195,10 @@ disambiguations:
     #  : dependency
     # path/file.ext1 : some/path/../file.ext2
     pattern: '([\/\\].*:\s+.*\s\\$|: \\$|^[ %]:|^[\w\s\/\\.]+\w+\.\w+\s*:\s+[\w\s\/\\.]+\w+\.\w+)'
+- extensions: ['.dml']
+  rules:
+  - language: Device Modeling Language
+    pattern: '(^dml\s1.4;)'
 - extensions: ['.dsp']
   rules:
   - language: Microsoft Developer Studio Project

lib/linguist/languages.yml

@@ -1581,6 +1581,16 @@ DirectX 3D File:
   ace_mode: text
   tm_scope: none
   language_id: 201049282
+Device Modeling Language:
+  type: programming
+  aliases:
+  - DML
+  extensions:
+  - ".dml"
+  ace_mode: text
+  color: "#0068B5"
+  tm_scope: source.dml
+  language_id: 806438883
 Dockerfile:
   type: programming
   aliases:

samples/Device Modeling Language/sample-device.dml

@@ -0,0 +1,73 @@
+dml 1.4;
+
+device sample_device;
+
+param desc = "A sample DML device";
+
+param documentation = "This is a sample DML device intended as a sample for"
+    + " the Linguist project";
+
+import "sample-interface.dml";
+
+attribute n_regs_written is (pseudo_attr, uint64_attr) "" {
+    method get() -> (attr_value_t) {
+        local uint8 n_written_regs = 0;
+        foreach reg in (each register_written in (regs)) {
+            if (reg.has_been_written())
+                n_written_regs += 1;
+        }
+        return SIM_make_attr_uint64(n_written_regs);
+    }
+
+    method set(attr_value_t val) throws {
+        if (SIM_attr_integer(val) != 0) {
+            log error: "n_regs_written can be only set to 0 to reset written"
+                + " status on all registers in the 'regs' bank";
+            throw;
+        }
+
+        foreach reg in (each register_written in (regs)) {
+            reg.reset_written();
+        }
+    }
+}
+
+implement sample {
+    saved int arg_sum = 0;
+    method simple_method(int arg) {
+        arg_sum += arg;
+    }
+}
+
+template register_written is (register, write) {
+    saved bool written;
+
+    method write(uint64 value) default {
+        this.written = true;
+        default(value);
+    }
+
+    shared method has_been_written() -> (bool) {
+        return this.written;
+    }
+
+    shared method reset_written() {
+        this.written = false;
+    }
+}
+
+bank regs {
+    param desc = dev.desc + "custom desc";
+    register r1 size 4 @ 0x0000 is (read, register_written) {
+        method read() -> (uint64) {
+            log info, 3: "read from r1";
+            return 42 + sample.arg_sum;
+        }
+    }
+    register r2 size 4 @ 0x0004 is (write, register_written) {
+        method write(uint64 value) {
+            log info, 3: "wrote %d to r2", value;
+            default(value);
+        }
+    }
+}

samples/Device Modeling Language/sample-interface.dml

@@ -0,0 +1,11 @@
+dml 1.4;
+
+header %{
+typedef struct {
+    void (*simple_method)(conf_object_t *obj, int arg);
+} sample_interface_t;
+%}
+
+extern typedef struct {
+    void (*simple_method)(conf_object_t *obj, int arg);
+} sample_interface_t;