Leverage experimental Extended Multiplication WAsm SIMD instructions #1202
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PiperOrigin-RevId: 345735031
omnisip
reviewed
Dec 6, 2020
| const v128_t vq31prod01 = wasm_i64x2_shl(vprod01, 1); | ||
| const v128_t vq31prod23 = wasm_i64x2_add(vprod23, vprod23); | ||
| const v128_t vq31prod45 = wasm_i64x2_shl(vprod45, 1); | ||
| const v128_t vq31prod67 = wasm_i64x2_add(vprod67, vprod67); |
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@Maratyszcza what benefit do you get out of using a wasm_i64x2_shl(...,1) over adding it twice? Is it because of the latency and the ALU?
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More even distribution of uops across execution ports and shorter average latency. Older x86 CPUs (e.g. pre-Nehalem and Atom uarchs) have high latency for [V]PADDQ, so it pays off to replace additions with shifts. However, CPUs often have fewer SIMD shift ports than SIMD ALU ports, so we don't want to replace all additions with shifts.
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Leverage experimental Extended Multiplication WAsm SIMD instructions