Fix FakeJit, start preparing a little for ARM64

Core/MIPS/JitCommon/JitBlockCache.cpp

@@ -50,7 +50,7 @@
 #include "Common/x64Analyzer.h"
 #include "Core/MIPS/x86/Asm.h"
 #else
-#warning "Unsupported arch!"
+// FakeJit doesn't need an emitter, no blocks will be created
 #include "Core/MIPS/MIPS.h"
 #endif
 // #include "JitBase.h"

Core/MIPS/JitCommon/JitBlockCache.h

@@ -39,7 +39,6 @@ typedef Gen::XCodeBlock NativeCodeBlock;
 namespace MIPSGen { class MIPSEmitter; }
 typedef MIPSGen::MIPSCodeBlock NativeCodeBlock;
 #else
-#warning "Unsupported arch!"
 #include "Common/FakeEmitter.h"
 namespace FakeGen { class FakeXEmitter; }
 typedef FakeGen::FakeXCodeBlock NativeCodeBlock;

Core/MIPS/JitCommon/NativeJit.h

@@ -32,9 +32,12 @@ typedef MIPSComp::Jit NativeJit;
 #elif defined(MIPS)
 #include "../MIPS/MipsJit.h"
 typedef MIPSComp::Jit NativeJit;
+//#elif defined(ARM64)
+//#include "../ARM64/Arm64Jit.h"
+//typedef MIPSComp::Arm64Jit NativeJit;
 #else
 #include "../fake/FakeJit.h"
-typedef MIPSComp::Jit FakeJit;
+typedef MIPSComp::FakeJit NativeJit;
 #endif
 
 namespace MIPSComp {
@@ -43,4 +46,4 @@ namespace MIPSComp {
 	typedef void (NativeJit::*MIPSCompileFunc)(MIPSOpcode opcode);
 	typedef int (NativeJit::*MIPSReplaceFunc)();
 
-}
+}

Core/MIPS/MIPS.cpp

@@ -210,9 +210,13 @@ void MIPSState::Init() {
 
 	if (PSP_CoreParameter().cpuCore == CPU_JIT) {
 #ifdef ARM
-		MIPSComp::jit = new MIPSComp::ArmJit(this);
+			MIPSComp::jit = new MIPSComp::ArmJit(this);
+#elif defined(_M_IX86) || defined(_M_X64)
+			MIPSComp::jit = new MIPSComp::Jit(this);
+#elif defined(MIPS)
+			MIPSComp::jit = new MIPSComp::Jit(this);
 #else
-		MIPSComp::jit = new MIPSComp::Jit(this);
+			MIPSComp::jit = new MIPSComp::FakeJit(this);
 #endif
 	}
 }
@@ -232,8 +236,12 @@ void MIPSState::UpdateCore(CPUCore desired) {
 		if (!MIPSComp::jit) {
 #ifdef ARM
 			MIPSComp::jit = new MIPSComp::ArmJit(this);
-#else
+#elif defined(_M_IX86) || defined(_M_X64)
 			MIPSComp::jit = new MIPSComp::Jit(this);
+#elif defined(MIPS)
+			MIPSComp::jit = new MIPSComp::Jit(this);
+#else
+			MIPSComp::jit = new MIPSComp::FakeJit(this);
 #endif
 		}
 		break;
@@ -316,4 +324,4 @@ void MIPSState::InvalidateICache(u32 address, int length) {
 void MIPSState::ClearJitCache() {
 	if (MIPSComp::jit)
 		MIPSComp::jit->ClearCache();
-}
+}

Core/MIPS/MIPSTables.cpp

@@ -95,7 +95,7 @@ struct MIPSInstruction {
 #elif defined(MIPS)
 #define JITFUNC(f) (&Jit::f)
 #else
-#error Unknown architecture
+#define JITFUNC(f) (&FakeJit::f)
 #endif
 
 using namespace MIPSDis;

Core/MIPS/fake/FakeJit.cpp

@@ -29,7 +29,7 @@
 #include "Core/MIPS/MIPSTables.h"
 #include "Core/HLE/ReplaceTables.h"
 
-#include "FakeJit.h"
+#include "FakeFakeJit.h"
 #include "CPUDetect.h"
 
 void DisassembleFake(const u8 *data, int size) {
@@ -38,24 +38,24 @@ void DisassembleFake(const u8 *data, int size) {
 namespace MIPSComp
 {
 
-FakeJitOptions::FakeJitOptions() {
+FakeFakeJitOptions::FakeFakeJitOptions() {
 	enableBlocklink = true;
 	immBranches = false;
 	continueBranches = false;
 	continueJumps = false;
 	continueMaxInstructions = 300;
 }
 
-Jit::Jit(MIPSState *mips) : blocks(mips, this), mips_(mips)
+FakeJit::FakeJit(MIPSState *mips) : blocks(mips, this), mips_(mips)
 { 
 	logBlocks = 0;
 	dontLogBlocks = 0;
 	blocks.Init();
 }
 
-void Jit::DoState(PointerWrap &p)
+void FakeJit::DoState(PointerWrap &p)
 {
-	auto s = p.Section("Jit", 1, 2);
+	auto s = p.Section("FakeJit", 1, 2);
 	if (!s)
 		return;
 
@@ -69,9 +69,9 @@ void Jit::DoState(PointerWrap &p)
 }
 
 // This is here so the savestate matches between jit and non-jit.
-void Jit::DoDummyState(PointerWrap &p)
+void FakeJit::DoDummyState(PointerWrap &p)
 {
-	auto s = p.Section("Jit", 1, 2);
+	auto s = p.Section("FakeJit", 1, 2);
 	if (!s)
 		return;
 
@@ -83,35 +83,35 @@ void Jit::DoDummyState(PointerWrap &p)
 	}
 }
 
-void Jit::FlushAll()
+void FakeJit::FlushAll()
 {
 	//gpr.FlushAll();
 	//fpr.FlushAll();
 	FlushPrefixV();
 }
 
-void Jit::FlushPrefixV()
+void FakeJit::FlushPrefixV()
 {
 }
 
-void Jit::ClearCache()
+void FakeJit::ClearCache()
 {
 	blocks.Clear();
 	ClearCodeSpace();
 	//GenerateFixedCode();
 }
 
-void Jit::InvalidateCache()
+void FakeJit::InvalidateCache()
 {
 	blocks.Clear();
 }
 
-void Jit::InvalidateCacheAt(u32 em_address, int length)
+void FakeJit::InvalidateCacheAt(u32 em_address, int length)
 {
 	blocks.InvalidateICache(em_address, length);
 }
 
-void Jit::EatInstruction(MIPSOpcode op) {
+void FakeJit::EatInstruction(MIPSOpcode op) {
 	MIPSInfo info = MIPSGetInfo(op);
 	if (info & DELAYSLOT) {
 		ERROR_LOG_REPORT_ONCE(ateDelaySlot, JIT, "Ate a branch op.");
@@ -125,49 +125,49 @@ void Jit::EatInstruction(MIPSOpcode op) {
 	js.downcountAmount += MIPSGetInstructionCycleEstimate(op);
 }
 
-void Jit::CompileDelaySlot(int flags)
+void FakeJit::CompileDelaySlot(int flags)
 {
 }
 
 
-void Jit::Compile(u32 em_address) {
+void FakeJit::Compile(u32 em_address) {
 }
 
-void Jit::RunLoopUntil(u64 globalticks)
+void FakeJit::RunLoopUntil(u64 globalticks)
 {
 	((void (*)())enterCode)();
 }
 
-const u8 *Jit::DoJit(u32 em_address, JitBlock *b)
+const u8 *FakeJit::DoFakeJit(u32 em_address, FakeJitBlock *b)
 {
 	return b->normalEntry;
 }
 
-void Jit::AddContinuedBlock(u32 dest)
+void FakeJit::AddContinuedBlock(u32 dest)
 {
 }
 
-bool Jit::DescribeCodePtr(const u8 *ptr, std::string &name)
+bool FakeJit::DescribeCodePtr(const u8 *ptr, std::string &name)
 {
 	// TODO: Not used by anything yet.
 	return false;
 }
 
-void Jit::Comp_RunBlock(MIPSOpcode op)
+void FakeJit::Comp_RunBlock(MIPSOpcode op)
 {
 	// This shouldn't be necessary, the dispatcher should catch us before we get here.
 	ERROR_LOG(JIT, "Comp_RunBlock should never be reached!");
 }
 
-bool Jit::ReplaceJalTo(u32 dest) {
+bool FakeJit::ReplaceJalTo(u32 dest) {
 	return true;
 }
 
-void Jit::Comp_ReplacementFunc(MIPSOpcode op)
+void FakeJit::Comp_ReplacementFunc(MIPSOpcode op)
 {
 }
 
-void Jit::Comp_Generic(MIPSOpcode op)
+void FakeJit::Comp_Generic(MIPSOpcode op)
 {
 	FlushAll();
 	MIPSInterpretFunc func = MIPSGetInterpretFunc(op);
@@ -186,43 +186,43 @@ void Jit::Comp_Generic(MIPSOpcode op)
 	}
 }
 
-void Jit::MovFromPC(FakeReg r) {
+void FakeJit::MovFromPC(FakeReg r) {
 }
 
-void Jit::MovToPC(FakeReg r) {
+void FakeJit::MovToPC(FakeReg r) {
 }
 
-void Jit::SaveDowncount() {
+void FakeJit::SaveDowncount() {
 }
 
-void Jit::RestoreDowncount() {
+void FakeJit::RestoreDowncount() {
 }
 
-void Jit::WriteDownCount(int offset) {
+void FakeJit::WriteDownCount(int offset) {
 }
 
 // Abuses R2
-void Jit::WriteDownCountR(FakeReg reg) {
+void FakeJit::WriteDownCountR(FakeReg reg) {
 }
 
-void Jit::RestoreRoundingMode(bool force) {
+void FakeJit::RestoreRoundingMode(bool force) {
 }
 
-void Jit::ApplyRoundingMode(bool force) {
+void FakeJit::ApplyRoundingMode(bool force) {
 }
 
-void Jit::UpdateRoundingMode() {
+void FakeJit::UpdateRoundingMode() {
 }
 
-void Jit::WriteExit(u32 destination, int exit_num)
+void FakeJit::WriteExit(u32 destination, int exit_num)
 {
 }
 
-void Jit::WriteExitDestInR(FakeReg Reg) 
+void FakeJit::WriteExitDestInR(FakeReg Reg) 
 {
 }
 
-void Jit::WriteSyscallExit()
+void FakeJit::WriteSyscallExit()
 {
 }
 

Core/MIPS/fake/FakeJit.h

@@ -28,6 +28,8 @@
 namespace MIPSComp
 {
 
+typedef int FakeReg;
+
 struct FakeJitOptions
 {
 	FakeJitOptions();
@@ -39,17 +41,14 @@ struct FakeJitOptions
 	int continueMaxInstructions;
 };
 
-class Jit : public FakeGen::FakeXCodeBlock
+class FakeJit : public FakeGen::FakeXCodeBlock
 {
 public:
-	Jit(MIPSState *mips);
+	FakeJit(MIPSState *mips);
 
 	void DoState(PointerWrap &p);
 	static void DoDummyState(PointerWrap &p);
 
-	// Compiled ops should ignore delay slots
-	// the compiler will take care of them by itself
-	// OR NOT
 	void Comp_Generic(MIPSOpcode op);
 
 	void RunLoopUntil(u64 globalticks);
@@ -132,6 +131,7 @@ class Jit : public FakeGen::FakeXCodeBlock
 	void Comp_Vsgn(MIPSOpcode op) {}
 	void Comp_Vocp(MIPSOpcode op) {}
 	void Comp_ColorConv(MIPSOpcode op) {}
+	void Comp_Vbfy(MIPSOpcode op) {}
 
 	int Replace_fabsf() { return 0; }
 
@@ -188,8 +188,8 @@ class Jit : public FakeGen::FakeXCodeBlock
 	const u8 *breakpointBailout;
 };
 
-typedef void (Jit::*MIPSCompileFunc)(MIPSOpcode opcode);
-typedef int (Jit::*MIPSReplaceFunc)();
+typedef void (FakeJit::*MIPSCompileFunc)(MIPSOpcode opcode);
+typedef int (FakeJit::*MIPSReplaceFunc)();
 
 }	// namespace MIPSComp
 

android/jni/Locals.mk

@@ -48,6 +48,16 @@ ifeq ($(TARGET_ARCH_ABI),x86)
 
   LOCAL_CFLAGS := $(LOCAL_CFLAGS) -D_ARCH_32 -D_M_IX86 -fomit-frame-pointer -mtune=atom -mfpmath=sse -mssse3
 endif
+ifeq ($(TARGET_ARCH_ABI),arm64-v8a)
+  #LOCAL_LDLIBS += $(LOCAL_PATH)/../../ffmpeg/android/arm64/lib/libavformat.a
+  #LOCAL_LDLIBS += $(LOCAL_PATH)/../../ffmpeg/android/arm64/lib/libavcodec.a
+  #LOCAL_LDLIBS += $(LOCAL_PATH)/../../ffmpeg/android/arm64/lib/libswresample.a
+  #LOCAL_LDLIBS += $(LOCAL_PATH)/../../ffmpeg/android/arm64/lib/libswscale.a
+  #LOCAL_LDLIBS += $(LOCAL_PATH)/../../ffmpeg/android/arm64/lib/libavutil.a
+  #LOCAL_C_INCLUDES += $(LOCAL_PATH)/../../ffmpeg/android/arm64/include
+
+  LOCAL_CFLAGS := $(LOCAL_CFLAGS) -D_ARCH_64 -DARM64
+endif
 
 # Compile with profiling.
 ifeq ($(ANDROID_NDK_PROFILER),1)