Merge pull request #18140 from unknownbrackets/x86-sc

x86jit: Fix spill on sc in longer block
hrydgard · Sep 12, 2023 · 87a4344 · 87a4344
2 parents 9d058ef + 1fad623
commit 87a4344
Showing 1 changed file with 6 additions and 0 deletions.
diff --git a/Core/MIPS/x86/CompLoadStore.cpp b/Core/MIPS/x86/CompLoadStore.cpp
@@ -428,6 +428,12 @@ namespace MIPSComp {
 			break;
 
 		case 56: // sc
+			// Map before the jump in case any regs spill.  Unlock happens inside CompITypeMemWrite().
+			// This is not a very common op, but it's in jit so memory breakpoints can trip.
+			gpr.Lock(rt, rs);
+			gpr.MapReg(rt, true, true);
+			gpr.MapReg(rs, true, false);
+
 			CMP(8, MDisp(X64JitConstants::CTXREG, -128 + offsetof(MIPSState, llBit)), Imm8(1));
 			skipStore = J_CC(CC_NE);