periph/spi: printing and testing SPI clock rates

tests/periph_spi: printing and testing SPI clock rates drivers/periph_spi: change API of spi_acquire (from RIOT-OS#15904) drivers/periph_spi: add the `bus` parameter to spi_get_*() This was necessary for implementations where multiple devices can have different clock sources. This broke the macros SPI_CLK_* that were reverted to an enum. periph/spi: adapted to the new API Arbitrary speed support was added to all implementations where it was missing. nrf52/periph/spi: moved in nfr5x_common (RIOT-OS#16814)
hugueslarrive · Sep 13, 2021 · b42c41d · b42c41d
1 parent 9892286
commit b42c41d
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Showing 39 changed files with 938 additions and 894 deletions.
diff --git a/boards/common/kw41z/include/periph_conf_common.h b/boards/common/kw41z/include/periph_conf_common.h
@@ -122,50 +122,6 @@ static const uart_conf_t uart_config[] = {
 #define LPUART_0_SRC        3
 /** @} */
 
-/**
- * @name   SPI clock configuration
- *
- * Clock configuration values based on the configured 16Mhz module clock.
- *
- * Auto-generated by:
- * cpu/kinetis/dist/calc_spi_scalers/calc_spi_scalers.c
- *
-* @{
-*/
-static const uint32_t spi_clk_config[] = {
-    (
-        SPI_CTAR_PBR(2) | SPI_CTAR_BR(5) |          /* -> 100000Hz */
-        SPI_CTAR_PCSSCK(2) | SPI_CTAR_CSSCK(4) |
-        SPI_CTAR_PASC(2) | SPI_CTAR_ASC(4) |
-        SPI_CTAR_PDT(2) | SPI_CTAR_DT(4)
-    ),
-    (
-        SPI_CTAR_PBR(2) | SPI_CTAR_BR(3) |          /* -> 400000Hz */
-        SPI_CTAR_PCSSCK(2) | SPI_CTAR_CSSCK(2) |
-        SPI_CTAR_PASC(2) | SPI_CTAR_ASC(2) |
-        SPI_CTAR_PDT(2) | SPI_CTAR_DT(2)
-    ),
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(3) |          /* -> 1000000Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(3) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(3) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(3)
-    ),
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(0) |          /* -> 4000000Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(1) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(1) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(1)
-    ),
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(0) |          /* -> 4000000Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(0) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(0) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(0)
-    )
-};
-/** @} */
-
 /**
  * @name Random Number Generator configuration
  * @{

diff --git a/boards/frdm-k22f/include/periph_conf.h b/boards/frdm-k22f/include/periph_conf.h
@@ -191,47 +191,8 @@ static const pwm_conf_t pwm_config[] = {
 
 /**
  * @name   SPI configuration
- *
- * Clock configuration values based on the configured 48Mhz module clock.
- *
- * Auto-generated by:
- * cpu/kinetis/dist/calc_spi_scalers/calc_spi_scalers.c
- *
-* @{
-*/
-static const uint32_t spi_clk_config[] = {
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(8) |          /* -> 93750Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(8) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(8) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(8)
-    ),
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(6) |          /* -> 375000Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(6) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(6) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(6)
-    ),
-    (
-        SPI_CTAR_PBR(1) | SPI_CTAR_BR(4) |          /* -> 1000000Hz */
-        SPI_CTAR_PCSSCK(1) | SPI_CTAR_CSSCK(3) |
-        SPI_CTAR_PASC(1) | SPI_CTAR_ASC(3) |
-        SPI_CTAR_PDT(1) | SPI_CTAR_DT(3)
-    ),
-    (
-        SPI_CTAR_PBR(2) | SPI_CTAR_BR(0) |          /* -> 4800000Hz */
-        SPI_CTAR_PCSSCK(2) | SPI_CTAR_CSSCK(0) |
-        SPI_CTAR_PASC(2) | SPI_CTAR_ASC(0) |
-        SPI_CTAR_PDT(2) | SPI_CTAR_DT(0)
-    ),
-    (
-        SPI_CTAR_PBR(1) | SPI_CTAR_BR(0) |          /* -> 8000000Hz */
-        SPI_CTAR_PCSSCK(1) | SPI_CTAR_CSSCK(0) |
-        SPI_CTAR_PASC(1) | SPI_CTAR_ASC(0) |
-        SPI_CTAR_PDT(1) | SPI_CTAR_DT(0)
-    )
-};
-
+ * @{
+ */
 static const spi_conf_t spi_config[] = {
     {
         .dev      = SPI0,

diff --git a/boards/frdm-k64f/include/periph_conf.h b/boards/frdm-k64f/include/periph_conf.h
@@ -188,47 +188,8 @@ static const pwm_conf_t pwm_config[] = {
 
 /**
  * @name   SPI configuration
- *
- * Clock configuration values based on the configured 30Mhz module clock.
- *
- * Auto-generated by:
- * cpu/kinetis/dist/calc_spi_scalers/calc_spi_scalers.c
- *
-* @{
-*/
-static const uint32_t spi_clk_config[] = {
-    (
-        SPI_CTAR_PBR(2) | SPI_CTAR_BR(6) |          /* -> 93750Hz */
-        SPI_CTAR_PCSSCK(2) | SPI_CTAR_CSSCK(5) |
-        SPI_CTAR_PASC(2) | SPI_CTAR_ASC(5) |
-        SPI_CTAR_PDT(2) | SPI_CTAR_DT(5)
-    ),
-    (
-        SPI_CTAR_PBR(2) | SPI_CTAR_BR(4) |          /* -> 375000Hz */
-        SPI_CTAR_PCSSCK(2) | SPI_CTAR_CSSCK(3) |
-        SPI_CTAR_PASC(2) | SPI_CTAR_ASC(3) |
-        SPI_CTAR_PDT(2) | SPI_CTAR_DT(3)
-    ),
-    (
-        SPI_CTAR_PBR(2) | SPI_CTAR_BR(2) |          /* -> 1000000Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(4) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(4) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(4)
-    ),
-    (
-        SPI_CTAR_PBR(1) | SPI_CTAR_BR(0) |          /* -> 5000000Hz */
-        SPI_CTAR_PCSSCK(1) | SPI_CTAR_CSSCK(0) |
-        SPI_CTAR_PASC(1) | SPI_CTAR_ASC(0) |
-        SPI_CTAR_PDT(1) | SPI_CTAR_DT(0)
-    ),
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(0) |          /* -> 7500000Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(1) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(1) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(1)
-    )
-};
-
+ * @{
+ */
 static const spi_conf_t spi_config[] = {
     {
         .dev      = SPI0,

diff --git a/boards/mulle/include/periph_conf.h b/boards/mulle/include/periph_conf.h
@@ -260,47 +260,8 @@ static const pwm_conf_t pwm_config[] = {
 
 /**
  * @name SPI configuration
- *
- * Clock configuration values based on the configured 47988736Hz module clock.
- *
- * Auto-generated by:
- * cpu/kinetis/dist/calc_spi_scalers/calc_spi_scalers.c
- *
  * @{
  */
-static const uint32_t spi_clk_config[] = {
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(8) |          /* -> 93728Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(8) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(8) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(8)
-    ),
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(6) |          /* -> 374912Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(6) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(6) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(6)
-    ),
-    (
-        SPI_CTAR_PBR(1) | SPI_CTAR_BR(4) |          /* -> 999765Hz */
-        SPI_CTAR_PCSSCK(1) | SPI_CTAR_CSSCK(3) |
-        SPI_CTAR_PASC(1) | SPI_CTAR_ASC(3) |
-        SPI_CTAR_PDT(1) | SPI_CTAR_DT(3)
-    ),
-    (
-        SPI_CTAR_PBR(2) | SPI_CTAR_BR(0) |          /* -> 4798873Hz */
-        SPI_CTAR_PCSSCK(2) | SPI_CTAR_CSSCK(0) |
-        SPI_CTAR_PASC(2) | SPI_CTAR_ASC(0) |
-        SPI_CTAR_PDT(2) | SPI_CTAR_DT(0)
-    ),
-    (
-        SPI_CTAR_PBR(1) | SPI_CTAR_BR(0) |          /* -> 7998122Hz */
-        SPI_CTAR_PCSSCK(1) | SPI_CTAR_CSSCK(0) |
-        SPI_CTAR_PASC(1) | SPI_CTAR_ASC(0) |
-        SPI_CTAR_PDT(1) | SPI_CTAR_DT(0)
-    )
-};
-
 static const spi_conf_t spi_config[] = {
     {
         .dev      = SPI0,

diff --git a/boards/openlabs-kw41z-mini/include/periph_conf.h b/boards/openlabs-kw41z-mini/include/periph_conf.h
@@ -266,47 +266,8 @@ static const pwm_conf_t pwm_config[] = {
 
 /**
  * @name   SPI configuration
- *
- * Clock configuration values based on the configured 16Mhz module clock.
- *
- * Auto-generated by:
- * cpu/kinetis/dist/calc_spi_scalers/calc_spi_scalers.c
- *
  * @{
  */
-static const uint32_t spi_clk_config[] = {
-    (
-        SPI_CTAR_PBR(2) | SPI_CTAR_BR(5) |          /* -> 100000Hz */
-        SPI_CTAR_PCSSCK(2) | SPI_CTAR_CSSCK(4) |
-        SPI_CTAR_PASC(2) | SPI_CTAR_ASC(4) |
-        SPI_CTAR_PDT(2) | SPI_CTAR_DT(4)
-    ),
-    (
-        SPI_CTAR_PBR(2) | SPI_CTAR_BR(3) |          /* -> 400000Hz */
-        SPI_CTAR_PCSSCK(2) | SPI_CTAR_CSSCK(2) |
-        SPI_CTAR_PASC(2) | SPI_CTAR_ASC(2) |
-        SPI_CTAR_PDT(2) | SPI_CTAR_DT(2)
-    ),
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(3) |          /* -> 1000000Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(3) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(3) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(3)
-    ),
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(0) |          /* -> 4000000Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(1) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(1) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(1)
-    ),
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(0) |          /* -> 4000000Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(0) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(0) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(0)
-    )
-};
-
 static const spi_conf_t spi_config[] = {
     {
         .dev      = SPI0,

diff --git a/boards/pba-d-01-kw2x/include/periph_conf.h b/boards/pba-d-01-kw2x/include/periph_conf.h
@@ -174,47 +174,8 @@ static const pwm_conf_t pwm_config[] = {
 
 /**
  * @name    SPI device configuration
- *
- * Clock configuration values based on the configured 48Mhz module clock.
- *
- * Auto-generated by:
- * cpu/kinetis/dist/calc_spi_scalers/calc_spi_scalers.c
- *
  * @{
  */
-static const uint32_t spi_clk_config[] = {
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(8) |          /* -> 93750Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(8) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(8) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(8)
-    ),
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(6) |          /* -> 375000Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(6) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(6) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(6)
-    ),
-    (
-        SPI_CTAR_PBR(1) | SPI_CTAR_BR(4) |          /* -> 1000000Hz */
-        SPI_CTAR_PCSSCK(1) | SPI_CTAR_CSSCK(3) |
-        SPI_CTAR_PASC(1) | SPI_CTAR_ASC(3) |
-        SPI_CTAR_PDT(1) | SPI_CTAR_DT(3)
-    ),
-    (
-        SPI_CTAR_PBR(2) | SPI_CTAR_BR(0) |          /* -> 4800000Hz */
-        SPI_CTAR_PCSSCK(2) | SPI_CTAR_CSSCK(0) |
-        SPI_CTAR_PASC(2) | SPI_CTAR_ASC(0) |
-        SPI_CTAR_PDT(2) | SPI_CTAR_DT(0)
-    ),
-    (
-        SPI_CTAR_PBR(1) | SPI_CTAR_BR(0) |          /* -> 8000000Hz */
-        SPI_CTAR_PCSSCK(1) | SPI_CTAR_CSSCK(0) |
-        SPI_CTAR_PASC(1) | SPI_CTAR_ASC(0) |
-        SPI_CTAR_PDT(1) | SPI_CTAR_DT(0)
-    )
-};
-
 static const spi_conf_t spi_config[] = {
     {
         .dev      = SPI0,

diff --git a/cpu/atmega_common/include/periph_cpu_common.h b/cpu/atmega_common/include/periph_cpu_common.h
@@ -110,30 +110,6 @@ typedef enum {
     SPI_MODE_3 = SPI_MODE_SEL(1, 1)     /**< mode 3 */
 } spi_mode_t;
 /** @} */
-
-/**
- * @brief   SPI speed selection macro
- *
- * We encode the speed in bits 2, 1, and 0, where bit0 and bit1 hold the SPCR
- * prescaler bits, while bit2 holds the SPI2X bit.
- */
-#define SPI_CLK_SEL(s2x, pr1, pr0)    ((s2x << 2) | (pr1 << 1) | pr0)
-
-/**
- * @name   Override SPI speed values
- *
- * We assume a master clock speed of 16MHz here.
- * @{
- */
-#define HAVE_SPI_CLK_T
-typedef enum {
-    SPI_CLK_100KHZ = SPI_CLK_SEL(0, 1, 1),      /**< 16/128 -> 125KHz */
-    SPI_CLK_400KHZ = SPI_CLK_SEL(1, 1, 0),      /**< 16/32  -> 500KHz */
-    SPI_CLK_1MHZ   = SPI_CLK_SEL(0, 0, 1),      /**< 16/16  -> 1MHz */
-    SPI_CLK_5MHZ   = SPI_CLK_SEL(0, 0, 0),      /**< 16/4   -> 4MHz */
-    SPI_CLK_10MHZ  = SPI_CLK_SEL(1, 0, 0)       /**< 16/2   -> 8MHz */
-} spi_clk_t;
-/** @} */
 #endif /* ifndef DOXYGEN */
 
 /**