v1.21.0

• Fixed BlockEncoder returning an error when trying to encode a 32-bit branch from 0 -> FFFFFF00 #511
• Rust: Add Instruction::try_immediate() to the API docs #438 (Credit @mbbutler)

v1.20.0

• Added new Intel instructions #428
  • AVX-VNNI-INT16
  • SHA512
  • SM3
  • SM4
  • TSE

v1.19.0

• Added new Intel instructions #400
  • AMX-COMPLEX
• Use cc formatter options when formatting CMPccXADD instructions #374
• Rust: serde serialization format changed #372 (which is allowed to change between iced releases).
  • All enums are now saved as integers, which results in faster json (de)serialization and less strings in the final binary when using a human readable serialization format such as json. This also means we don't need a hashmap to quickly look up values so the optional hashbrown dependency that was used if no_std + serde has now been removed.

v1.18.0

• Added new AMD instructions #369
  • RMPQUERY
• Added new Intel instructions #369
  • AMX-FP16
  • AVX-IFMA
  • AVX-NE-CONVERT
  • AVX-VNNI-INT8
  • CMPCCXADD
  • MSRLIST
  • PREFETCHITI
  • RAO-INT
  • WRMSRNS
• Added Java port #304
• Added Lua bindings #299
• Rust: Make all clippy-suggested functions const #296 (Credit: @clubby789)
• Rust: MSRV bumped from 1.54.0 to 1.57.0 #331
• Python: Support 3.11

v1.17.0

• Improved BlockEncoder speed #262, #265
  • The assembler also uses it so its encoding speed should be improved as well
• .NET: Improved C# Decoder speed (100MB/s -> 130MB/s, .NET 6 x64) #266, #267
  • For reference, Rust: 260MB/s, Python module: 50MB/s, nodejs+wasm module: 46MB/s
• Added missing undocumented VIA XSHA512 alias #261
• Added an instruction (a.zero_bytes()) that can be used as an assembler label #272
• Rust: Added CodeAssembler::assemble_options() and an API to get the address of labels after the code has been assembled #273

v1.16.0

• Updated VIA PADLOCK instructions, added missing XSHA512 instruction #260 (VIA info from @tremalrik)
• Added IsJcxShort/IsLoopcc/IsLoop methods/props #227 (Credit @am0nsec), #259
• Rust
  • Made CodeAssembler traits public #236 (Credit @Kixiron)
  • Make some Instruction/Register fns const #240 (Credit @i509VCB)
  • Removed HashMap (hashbrown crate if no_std) dependency from block_encoder feature #248
    • Fixes #247 (can't build with no_std on Windows)
    • This also resulted in better block encoder perf (30s -> 19s when encoding a ton of instructions)
  • Removed deprecated Instruction::with_* methods (use with{1,2,3,4,5}() instead)
  • Bumped MSRV to 1.54.0 #252
• Python
  • PyPy wheels uploaded to PyPI (Linux x64, Windows x64) #250
  • Minimum supported Python version is now 3.7 #251
• JS:
  • BigInt is supported by default now #258

v1.15.0

• Added Intel Knights Corner (KNC) instructions
  • Enable decoding of KNC instructions by passing in DecoderOptions::KNC to the Decoder constructor
  • Rust: mvex feature must also be enabled to decode KNC instructions
• Python:
  • Enum type annotations can be used without mypy reporting errors, see here
  • Added musllinux-x86_64 (Alpine) wheel
• Rust:
  • (serde feature): json deserialization (Instruction) is faster (json is still inefficient and slow, though)
  • Minimum supported Rust version (MSRV) updated from 1.41.0 to 1.48.0
• code_asm: Added Jcc, SETcc, CMOVcc, REP{,N}E aliases (eg. a.jz(lbl))
• code_asm: Added a.vex()/a.evex() fns to select VEX or EVEX encoding

v1.14.0

• Rust: Creating instructions got a lot easier:

  let mut a = CodeAssembler::new(64)?;
  a.xor(ecx, ecx)?;
  a.add(byte_ptr(rdx + r15 * 8 + 7), 0x10)?;
  assert_eq!(a.instructions().len(), 2);
  let bytes = a.assemble(0x1234_5678)?;
  assert_eq!(bytes, b"\x31\xC9\x42\x80\x44\xFA\x07\x10");

  All instructions are supported, including VEX/EVEX instructions.
  It requires the code_asm feature which is disabled by default.
  See the Rust README for a longer example.
• Rust: Added Instruction::with{1,2,3,4,5}() methods to create instructions. The older methods with longer names have been deprecated.

  // old: 
  let _ = Instruction::try_with_reg_reg_u32(Code::Imul_r16_rm16_imm16, Register::CX, Register::DX, 0x5AA5)?;
  // new: (the '3' suffix means '3 operands')
  let _ = Instruction::with3(Code::Imul_r16_rm16_imm16, Register::CX, Register::DX, 0x5AA5)?;
  // A number suffix (`u32`, `u64`, `i64`) is sometimes needed to help the compiler:
  let _ = Instruction::with2(Code::Mov_r64_imm64, Register::RAX, 0x1234_5678_9ABC_DEF0u64)?;

• Python: Instruction can be serialized/deserialized with pickle (Credit: @paulfariello)
• Added Instruction::is_string_instruction() (Credit: @woodruffw) which returns true if it's eg. SCASB, MOVSQ, or any other string instruction.
• Rust: optional serde feature added to serialize/deserialize Instruction

v1.13.0

• Added Intel AVX512-FP16 instructions
• Added undocumented Intel 0F 0E and 0F 0F instructions (enable with DecoderOptions.Udbg/::UDBG), see https://github.com/chip-red-pill/udbgInstr
• Linux aarch64 Python wheel pushed to PyPI
• Python: Added MemoryOperand.ctor_u64() to create an instance with an unsigned displ

v1.12.0

• Rust: Decoder perf improvements
  • Decoding throughput up 25% from ~205 MB/s to ~255 MB/s (Skylake 3.5GHz CPU)
  • It's now 3x-9x faster than x86 decoders written in C (and ~2.5x faster than iced-C#)
  • Benchmark: see here
• Rust: 'fast' formatter perf improvements. Decode+fmt is 2.5x-12x faster than the other disassemblers in the benchmark.
• Formatters now support VPCMP{U,}{B,W,D,Q} pseudo ops, eg. VPCMPLEB
• gas formatter updated to add SYSEXIT L/Q suffixes in 64-bit mode instead of a REX.W prefix