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Revert "[DWARF] Fix a few corner cases in expression emission"
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This reverts commit r239380 due to apparently GDB regressions:
http://lab.llvm.org:8011/builders/clang-x86_64-ubuntu-gdb-75/builds/22562

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239420 91177308-0d34-0410-b5e6-96231b3b80d8
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dwblaikie committed Jun 9, 2015
1 parent 8e8c4b5 commit 6eee237
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Showing 4 changed files with 9 additions and 143 deletions.
2 changes: 0 additions & 2 deletions lib/CodeGen/AsmPrinter/DwarfDebug.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1562,8 +1562,6 @@ void DwarfDebug::emitDebugLoc() {
Asm->OutStreamer->EmitLabel(List.Label);
const DwarfCompileUnit *CU = List.CU;
for (const auto &Entry : DebugLocs.getEntries(List)) {
if (Entry.BeginSym == Entry.EndSym)
continue;
// Set up the range. This range is relative to the entry point of the
// compile unit. This is a hard coded 0 for low_pc when we're emitting
// ranges, or the DW_AT_low_pc on the compile unit otherwise.
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37 changes: 9 additions & 28 deletions lib/CodeGen/AsmPrinter/DwarfExpression.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -65,11 +65,6 @@ void DwarfExpression::AddShr(unsigned ShiftBy) {
EmitOp(dwarf::DW_OP_shr);
}

void DwarfExpression::AddOpStackValue() {
if (DwarfVersion >= 4)
EmitOp(dwarf::DW_OP_stack_value);
}

bool DwarfExpression::AddMachineRegIndirect(unsigned MachineReg, int Offset) {
if (isFrameRegister(MachineReg)) {
// If variable offset is based in frame register then use fbreg.
Expand Down Expand Up @@ -177,14 +172,16 @@ void DwarfExpression::AddSignedConstant(int Value) {
// value, so the producers and consumers started to rely on heuristics
// to disambiguate the value vs. location status of the expression.
// See PR21176 for more details.
AddOpStackValue();
if (DwarfVersion >= 4)
EmitOp(dwarf::DW_OP_stack_value);
}

void DwarfExpression::AddUnsignedConstant(unsigned Value) {
EmitOp(dwarf::DW_OP_constu);
EmitUnsigned(Value);
// cf. comment in DwarfExpression::AddSignedConstant().
AddOpStackValue();
if (DwarfVersion >= 4)
EmitOp(dwarf::DW_OP_stack_value);
}

static unsigned getOffsetOrZero(unsigned OffsetInBits,
Expand Down Expand Up @@ -215,30 +212,15 @@ bool DwarfExpression::AddMachineRegExpression(const DIExpression *Expr,
getOffsetOrZero(OffsetInBits, PieceOffsetInBits));
}
case dwarf::DW_OP_plus: {
// [DW_OP_reg,Offset,DW_OP_plus,DW_OP_deref] --> [DW_OP_breg,Offset].
auto N = I.getNext();
unsigned Offset = I->getArg(0);
// First combine all DW_OP_plus until we hit either a DW_OP_deref or a
// DW_OP_bit_piece
while (N != E && N->getOp() == dwarf::DW_OP_plus) {
Offset += N->getArg(0);
++I;
N = I.getNext();
}
if (N != E && N->getOp() == dwarf::DW_OP_deref) {
// [DW_OP_reg,Offset,DW_OP_plus,DW_OP_deref] --> [DW_OP_breg,Offset].
unsigned Offset = I->getArg(0);
ValidReg = AddMachineRegIndirect(MachineReg, Offset);
std::advance(I, 2);
} else {
assert ((N == E) || (N->getOp() == dwarf::DW_OP_bit_piece));
if (Offset == 0) {
ValidReg = AddMachineRegPiece(MachineReg);
} else {
ValidReg = AddMachineRegIndirect(MachineReg, Offset);
AddOpStackValue();
}
++I;
}
break;
break;
} else
ValidReg = AddMachineRegPiece(MachineReg);
}
case dwarf::DW_OP_deref: {
// [DW_OP_reg,DW_OP_deref] --> [DW_OP_breg].
Expand All @@ -255,7 +237,6 @@ bool DwarfExpression::AddMachineRegExpression(const DIExpression *Expr,

// Emit remaining elements of the expression.
AddExpression(I, E, PieceOffsetInBits);

return true;
}

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3 changes: 0 additions & 3 deletions lib/CodeGen/AsmPrinter/DwarfExpression.h
Original file line number Diff line number Diff line change
Expand Up @@ -83,9 +83,6 @@ class DwarfExpression {
bool AddMachineRegPiece(unsigned MachineReg, unsigned PieceSizeInBits = 0,
unsigned PieceOffsetInBits = 0);

/// Emit a DW_OP_stack_value
void AddOpStackValue();

/// Emit a signed constant.
void AddSignedConstant(int Value);
/// Emit an unsigned constant.
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110 changes: 0 additions & 110 deletions test/DebugInfo/X86/expressions.ll

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