Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

LNL: Release event updates #204

Merged
merged 1 commit into from
Jun 24, 2024
Merged

LNL: Release event updates #204

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
322 changes: 315 additions & 7 deletions LNL/events/lunarlake_lioncove_core.json
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,9 +1,9 @@
{
"Header": {
"Copyright": "Copyright (c) 2001 - 2024 Intel Corporation. All rights reserved.",
"Info": "Performance Monitoring Events for Intel(R) Core(TM) processors based on Lunar Lake performance hybrid architecture - V1.03",
"DatePublished": "06/12/2024",
"Version": "1.03",
"Info": "Performance Monitoring Events for Intel(R) Core(TM) processors based on Lunar Lake performance hybrid architecture - V1.04",
"DatePublished": "06/20/2024",
"Version": "1.04",
"Legend": ""
},
"Events": [
Expand Down Expand Up @@ -2219,6 +2219,34 @@
"PDISTCounter": "NA",
"Speculative": "1"
},
{
"EventCode": "0x75",
"UMask": "0x01",
"UMaskExt": "0x00",
"EventName": "INST_DECODED.DECODERS",
"BriefDescription": "Instruction decoders utilized in a cycle",
"PublicDescription": "Number of decoders utilized in a cycle when the MITE (legacy decode pipeline) fetches instructions.",
"Counter": "2",
"PEBScounters": "2",
"SampleAfterValue": "2000003",
"MSRIndex": "0x00",
"MSRValue": "0x00",
"Precise": "0",
"CollectPEBSRecord": "2",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0",
"PEBS": "0",
"Data_LA": "0",
"L1_Hit_Indication": "0",
"Errata": "null",
"Offcore": "0",
"Deprecated": "0",
"Equal": "0",
"PDISTCounter": "NA",
"Speculative": "1"
},
{
"EventCode": "0x76",
"UMask": "0x01",
Expand Down Expand Up @@ -3899,6 +3927,34 @@
"PDISTCounter": "NA",
"Speculative": "1"
},
{
"EventCode": "0xb2",
"UMask": "0x02",
"UMaskExt": "0x00",
"EventName": "UOPS_DISPATCHED.ALU",
"BriefDescription": "Uops executed on INT EU ALU ports.",
"PublicDescription": "Number of ALU integer uops dispatch to execution.",
"Counter": "0,1,2,3,4,5,6,7,8,9",
"PEBScounters": "0,1,2,3,4,5,6,7,8,9",
"SampleAfterValue": "2000003",
"MSRIndex": "0x00",
"MSRValue": "0x00",
"Precise": "0",
"CollectPEBSRecord": "2",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0",
"PEBS": "0",
"Data_LA": "0",
"L1_Hit_Indication": "0",
"Errata": "null",
"Offcore": "0",
"Deprecated": "0",
"Equal": "0",
"PDISTCounter": "NA",
"Speculative": "1"
},
{
"EventCode": "0xb2",
"UMask": "0x04",
Expand Down Expand Up @@ -3927,6 +3983,90 @@
"PDISTCounter": "NA",
"Speculative": "1"
},
{
"EventCode": "0xb2",
"UMask": "0x08",
"UMaskExt": "0x00",
"EventName": "UOPS_DISPATCHED.SLOW",
"BriefDescription": "Number of Uops dispatched/executed by Slow EU (e.g. 3+ cycles LEA, >1 cycles shift, iDIVs, CR; *H operation)",
"PublicDescription": "Number of Slow integer uops dispatch to execution.",
"Counter": "0,1,2,3,4,5,6,7,8,9",
"PEBScounters": "0,1,2,3,4,5,6,7,8,9",
"SampleAfterValue": "2000003",
"MSRIndex": "0x00",
"MSRValue": "0x00",
"Precise": "0",
"CollectPEBSRecord": "2",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0",
"PEBS": "0",
"Data_LA": "0",
"L1_Hit_Indication": "0",
"Errata": "null",
"Offcore": "0",
"Deprecated": "0",
"Equal": "0",
"PDISTCounter": "NA",
"Speculative": "1"
},
{
"EventCode": "0xb2",
"UMask": "0x10",
"UMaskExt": "0x00",
"EventName": "UOPS_DISPATCHED.STD",
"BriefDescription": "Uops executed on STD ports 4 and 9",
"PublicDescription": "Number of STD (Store Data) uops dispatch to execution",
"Counter": "0,1,2,3,4,5,6,7,8,9",
"PEBScounters": "0,1,2,3,4,5,6,7,8,9",
"SampleAfterValue": "2000003",
"MSRIndex": "0x00",
"MSRValue": "0x00",
"Precise": "0",
"CollectPEBSRecord": "2",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0",
"PEBS": "0",
"Data_LA": "0",
"L1_Hit_Indication": "0",
"Errata": "null",
"Offcore": "0",
"Deprecated": "0",
"Equal": "0",
"PDISTCounter": "NA",
"Speculative": "1"
},
{
"EventCode": "0xb2",
"UMask": "0x20",
"UMaskExt": "0X00",
"EventName": "UOPS_DISPATCHED.SHIFT",
"BriefDescription": "Number of (shift) 1-cycle Uops dispatched/executed by any of the Shift Eus",
"PublicDescription": "Number of SHIFT integer uops dispatch to execution",
"Counter": "0,1,2,3,4,5,6,7,8,9",
"PEBScounters": "0,1,2,3,4,5,6,7,8,9",
"SampleAfterValue": "2000003",
"MSRIndex": "0x00",
"MSRValue": "0x00",
"Precise": "0",
"CollectPEBSRecord": "2",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0",
"PEBS": "0",
"Data_LA": "0",
"L1_Hit_Indication": "0",
"Errata": "null",
"Offcore": "0",
"Deprecated": "0",
"Equal": "0",
"PDISTCounter": "NA",
"Speculative": "1"
},
{
"EventCode": "0xb2",
"UMask": "0x40",
Expand Down Expand Up @@ -3955,6 +4095,34 @@
"PDISTCounter": "NA",
"Speculative": "1"
},
{
"EventCode": "0xb2",
"UMask": "0x80",
"UMaskExt": "0x00",
"EventName": "UOPS_DISPATCHED.STA",
"BriefDescription": "Number of Uops dispatched on port 7; 8 and 13 (STA)",
"PublicDescription": "Number of STA (Store Address) uops dispatch to execution",
"Counter": "0,1,2,3,4,5,6,7,8,9",
"PEBScounters": "0,1,2,3,4,5,6,7,8,9",
"SampleAfterValue": "2000003",
"MSRIndex": "0x00",
"MSRValue": "0x00",
"Precise": "0",
"CollectPEBSRecord": "2",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0",
"PEBS": "0",
"Data_LA": "0",
"L1_Hit_Indication": "0",
"Errata": "null",
"Offcore": "0",
"Deprecated": "0",
"Equal": "0",
"PDISTCounter": "NA",
"Speculative": "1"
},
{
"EventCode": "0xb3",
"UMask": "0x01",
Expand Down Expand Up @@ -4039,6 +4207,34 @@
"PDISTCounter": "NA",
"Speculative": "1"
},
{
"EventCode": "0xb3",
"UMask": "0x08",
"UMaskExt": "0x00",
"EventName": "FP_ARITH_DISPATCHED.V3",
"BriefDescription": "Number of FP-arith-uops dispatched on 4th VEC port",
"PublicDescription": "Number of FP-arith-uops dispatched on 4th VEC port",
"Counter": "0,1,2,3,4,5,6,7,8,9",
"PEBScounters": "0,1,2,3,4,5,6,7,8,9",
"SampleAfterValue": "2000003",
"MSRIndex": "0x00",
"MSRValue": "0x00",
"Precise": "0",
"CollectPEBSRecord": "2",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0",
"PEBS": "0",
"Data_LA": "0",
"L1_Hit_Indication": "0",
"Errata": "null",
"Offcore": "0",
"Deprecated": "0",
"Equal": "0",
"PDISTCounter": "NA",
"Speculative": "1"
},
{
"EventCode": "0xc0",
"UMask": "0x00",
Expand Down Expand Up @@ -6116,8 +6312,36 @@
"UMask": "0x0C",
"UMaskExt": "0x00",
"EventName": "FP_ARITH_OPS_RETIRED.VECTOR_128B",
"BriefDescription": "FP_ARITH_OPS_RETIRED.VECTOR_128B",
"PublicDescription": "FP_ARITH_OPS_RETIRED.VECTOR_128B",
"BriefDescription": "FP_ARITH_OPS_RETIRED.VECTOR_128B [This event is alias to FP_ARITH_INST_RETIRED.VECTOR_128B]",
"PublicDescription": "FP_ARITH_OPS_RETIRED.VECTOR_128B [This event is alias to FP_ARITH_INST_RETIRED.VECTOR_128B]",
"Counter": "0,1,2,3,4,5,6,7,8,9",
"PEBScounters": "0,1,2,3,4,5,6,7,8,9",
"SampleAfterValue": "100003",
"MSRIndex": "0x00",
"MSRValue": "0x00",
"Precise": "0",
"CollectPEBSRecord": "2",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0",
"PEBS": "0",
"Data_LA": "0",
"L1_Hit_Indication": "0",
"Errata": "null",
"Offcore": "0",
"Deprecated": "0",
"Equal": "0",
"PDISTCounter": "NA",
"Speculative": "0"
},
{
"EventCode": "0xc7",
"UMask": "0x0C",
"UMaskExt": "0x00",
"EventName": "FP_ARITH_INST_RETIRED.VECTOR_128B",
"BriefDescription": "FP_ARITH_INST_RETIRED.VECTOR_128B [This event is alias to FP_ARITH_OPS_RETIRED.VECTOR_128B]",
"PublicDescription": "FP_ARITH_INST_RETIRED.VECTOR_128B [This event is alias to FP_ARITH_OPS_RETIRED.VECTOR_128B]",
"Counter": "0,1,2,3,4,5,6,7,8,9",
"PEBScounters": "0,1,2,3,4,5,6,7,8,9",
"SampleAfterValue": "100003",
Expand Down Expand Up @@ -6312,8 +6536,36 @@
"UMask": "0x30",
"UMaskExt": "0x00",
"EventName": "FP_ARITH_OPS_RETIRED.VECTOR_256B",
"BriefDescription": "FP_ARITH_OPS_RETIRED.VECTOR_256B",
"PublicDescription": "FP_ARITH_OPS_RETIRED.VECTOR_256B",
"BriefDescription": "FP_ARITH_OPS_RETIRED.VECTOR_256B [This event is alias to FP_ARITH_INST_RETIRED.VECTOR_256B]",
"PublicDescription": "FP_ARITH_OPS_RETIRED.VECTOR_256B [This event is alias to FP_ARITH_INST_RETIRED.VECTOR_256B]",
"Counter": "0,1,2,3,4,5,6,7,8,9",
"PEBScounters": "0,1,2,3,4,5,6,7,8,9",
"SampleAfterValue": "100003",
"MSRIndex": "0x00",
"MSRValue": "0x00",
"Precise": "0",
"CollectPEBSRecord": "2",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0",
"PEBS": "0",
"Data_LA": "0",
"L1_Hit_Indication": "0",
"Errata": "null",
"Offcore": "0",
"Deprecated": "0",
"Equal": "0",
"PDISTCounter": "NA",
"Speculative": "0"
},
{
"EventCode": "0xc7",
"UMask": "0x30",
"UMaskExt": "0x00",
"EventName": "FP_ARITH_INST_RETIRED.VECTOR_256B",
"BriefDescription": "FP_ARITH_INST_RETIRED.VECTOR_256B [This event is alias to FP_ARITH_OPS_RETIRED.VECTOR_256B]",
"PublicDescription": "FP_ARITH_INST_RETIRED.VECTOR_256B [This event is alias to FP_ARITH_OPS_RETIRED.VECTOR_256B]",
"Counter": "0,1,2,3,4,5,6,7,8,9",
"PEBScounters": "0,1,2,3,4,5,6,7,8,9",
"SampleAfterValue": "100003",
Expand Down Expand Up @@ -7119,6 +7371,62 @@
"PDISTCounter": "0",
"Speculative": "0"
},
{
"EventCode": "0xd2",
"UMask": "0x04",
"UMaskExt": "0x00",
"EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_HITM",
"BriefDescription": "Retired load instructions whose data sources were HitM responses from shared L3, Hit-with-FWD is normally excluded.",
"PublicDescription": "Counts retired load instructions whose data sources were HitM responses from shared L3, Hit-with-FWD is normally excluded.",
"Counter": "0,1,2,3",
"PEBScounters": "0,1,2,3",
"SampleAfterValue": "20011",
"MSRIndex": "0x00",
"MSRValue": "0x00",
"Precise": "1",
"CollectPEBSRecord": "2",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0",
"PEBS": "1",
"Data_LA": "1",
"L1_Hit_Indication": "0",
"Errata": "null",
"Offcore": "0",
"Deprecated": "0",
"Equal": "0",
"PDISTCounter": "0",
"Speculative": "0"
},
{
"EventCode": "0xd2",
"UMask": "0x10",
"UMaskExt": "0x00",
"EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD",
"BriefDescription": "Retired load instructions whose data sources were a cross-core Snoop hits and forwards data from an in on-package core cache (induced by NI$)",
"PublicDescription": "Counts retired load instructions whose data sources were a cross-core Snoop hits and forwards data from an in on-package core cache (induced by NI$)",
"Counter": "0,1,2,3",
"PEBScounters": "0,1,2,3",
"SampleAfterValue": "20011",
"MSRIndex": "0x00",
"MSRValue": "0x00",
"Precise": "1",
"CollectPEBSRecord": "2",
"TakenAlone": "0",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0",
"PEBS": "1",
"Data_LA": "1",
"L1_Hit_Indication": "0",
"Errata": "null",
"Offcore": "0",
"Deprecated": "0",
"Equal": "0",
"PDISTCounter": "0",
"Speculative": "0"
},
{
"EventCode": "0xe0",
"UMask": "0x20",
Expand Down
Loading
Loading