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CI: Introduce automated mapfile.csv verification #218

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36 changes: 36 additions & 0 deletions .github/workflows/verify-mapfile.yml
Original file line number Diff line number Diff line change
@@ -0,0 +1,36 @@
# This workflow will setup Python, run unittests, and execute verify_mapfile.py.

name: Verify mapfile.csv

on:
push:
pull_request:

permissions:
contents: read

jobs:
verify-mapfile:
runs-on: ubuntu-latest

defaults:
run:
working-directory: ${{ github.workspace }}/scripts/ci/verify_mapfile

steps:
- name: Checkout perfmon
uses: actions/checkout@692973e3d937129bcbf40652eb9f2f61becf3332 # v4.1.7

- name: Set up Python 3.x
uses: actions/setup-python@39cd14951b08e74b54015e9e001cdefcf80e669f # v5.1.1
with:
python-version: "3.x"

- name: Install Python packages
run: pip install -r requirements.txt

- name: Run verify_mapfile self tests
run: python -m unittest

- name: Validate mapfile.csv
run: python verify_mapfile.py
3 changes: 3 additions & 0 deletions .gitignore
Original file line number Diff line number Diff line change
@@ -1,4 +1,7 @@
__pycache__/
*.pyc
*.coverage
htmlcov/
.idea
scripts/inputs
scripts/outputs
Expand Down
3 changes: 3 additions & 0 deletions mapfile.csv
Original file line number Diff line number Diff line change
Expand Up @@ -18,8 +18,10 @@ GenuineIntel-6-5A,V15,/SLM/events/Silvermont_core.json,core,,,
GenuineIntel-6-5A,V15,/SLM/events/Silvermont_matrix.json,offcore,,,
GenuineIntel-6-5C,V13,/GLM/events/goldmont_core.json,core,,,
GenuineIntel-6-5C,V13,/GLM/events/goldmont_matrix.json,offcore,,,
GenuineIntel-6-5C,V13,/GLM/events/goldmont_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-5F,V13,/GLM/events/goldmont_core.json,core,,,
GenuineIntel-6-5F,V13,/GLM/events/goldmont_matrix.json,offcore,,,
GenuineIntel-6-5F,V13,/GLM/events/goldmont_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-1C,V5,/BNL/events/bonnell_core.json,core,,,
GenuineIntel-6-26,V5,/BNL/events/bonnell_core.json,core,,,
GenuineIntel-6-27,V5,/BNL/events/bonnell_core.json,core,,,
Expand All @@ -34,6 +36,7 @@ GenuineIntel-6-2D,V24,/JKT/events/Jaketown_uncore.json,uncore,,,
GenuineIntel-6-3A,V24,/IVB/events/ivybridge_core.json,core,,,
GenuineIntel-6-3A,V24,/IVB/events/ivybridge_matrix.json,offcore,,,
GenuineIntel-6-3A,V24,/IVB/events/ivybridge_uncore.json,uncore,,,
GenuineIntel-6-3A,V24,/IVB/events/ivybridge_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-3E,V24,/IVT/events/ivytown_core.json,core,,,
GenuineIntel-6-3E,V24,/IVT/events/ivytown_matrix.json,offcore,,,
GenuineIntel-6-3E,V24,/IVT/events/ivytown_uncore.json,uncore,,,
Expand Down
9 changes: 9 additions & 0 deletions scripts/ci/verify_mapfile/.coveragerc
Original file line number Diff line number Diff line change
@@ -0,0 +1,9 @@
[run]
branch = True

[report]
include =
verify_mapfile.py

exclude_lines =
if __name__ == '__main__':
54 changes: 54 additions & 0 deletions scripts/ci/verify_mapfile/README.md
Original file line number Diff line number Diff line change
@@ -0,0 +1,54 @@
# Verify `mapfile.csv`

## Overview

The goal of this helper script is to automatically check `mapfile.csv` for common issues. A few
examples:

* Bad file paths.
* Incorrect versions.
* Mismatched uncore experimental.
* Unexpected columns.
* Event files missing from family models.

## Setup

Install required packages either using the package manager or with `pip`.

```bash
pip install -r requirements.txt
```

## Running

```bash
python verify_mapfile.py
```

### Running Tests

```bash
python -m unittest
```

### Coverage

Coverage output is written to `htmlcov`.

```bash
python -m coverage run -m unittest
python -m coverage html
```

## Formatting

VS Code was configured as below for formatting.

```json
"[python]": {
"editor.defaultFormatter": "eeyore.yapf"
},
"yapf.args": [
"--style={based_on_style: google, indent_width: 4, column_limit: 100}"
]
```
Empty file.
49 changes: 49 additions & 0 deletions scripts/ci/verify_mapfile/mapfile_schema.json
Original file line number Diff line number Diff line change
@@ -0,0 +1,49 @@
{
"$schema": "https://json-schema.org/draft/2020-12/schema",
"title": "Perfmon Events mapfile.csv Schema",
"description": "A schema for validating https://github.com/intel/perfmon/blob/main/mapfile.csv",
"type": "array",
"items": {
"type" : "object",
"properties" : {
"Family-model" : {
"type": "string",
"pattern": "^GenuineIntel-6-[A-F0-9]{2}(-\\[[A-F0-9]+\\])?$"
},
"Version" : {
"type": "string",
"pattern": "^V\\d+(\\.\\d+)?$"
},
"Filename" : {
"type": "string",
"pattern": "^/[A-Z-]+/(events|metrics)/[a-z_DEJNPSWX-]+\\.json$"
},
"EventType" : {
"type": "string",
"pattern": "^(core|fp_arith_inst|hybridcore|metrics|offcore|uncore|uncore experimental)$"
},
"Core Type" : {
"type": "string",
"pattern": "^(0x[A-F0-9]{2})?$"
},
"Native Model ID" : {
"type": "string",
"pattern": "^(0x[A-F0-9]{6})?$"
},
"Core Role Name" : {
"type": "string",
"pattern": "^(Core|Atom)?$"
}
},
"required" : [
"Family-model",
"Version",
"Filename",
"EventType",
"Core Type",
"Native Model ID",
"Core Role Name"
],
"additionalProperties": false
}
}
1 change: 1 addition & 0 deletions scripts/ci/verify_mapfile/requirements.txt
Original file line number Diff line number Diff line change
@@ -0,0 +1 @@
jsonschema
Original file line number Diff line number Diff line change
@@ -0,0 +1,159 @@
Family-model,Version,Filename,EventType,Core Type,Native Model ID,Core Role Name
GenuineIntel-6-2E,V3,/NHM-EX/events/NehalemEX_core.json,core,,,
GenuineIntel-6-1E,V3,/NHM-EP/events/NehalemEP_core.json,core,,,
GenuineIntel-6-1F,V3,/NHM-EP/events/NehalemEP_core.json,core,,,
GenuineIntel-6-1A,V3,/NHM-EP/events/NehalemEP_core.json,core,,,
GenuineIntel-6-2F,V3,/WSM-EX/events/WestmereEX_core.json,core,,,
GenuineIntel-6-25,V3,/WSM-EP-SP/events/WestmereEP-SP_core.json,core,,,
GenuineIntel-6-2C,V3,/WSM-EP-DP/events/WestmereEP-DP_core.json,core,,,
GenuineIntel-6-37,V14,/SLM/events/Silvermont_core.json,core,,,
GenuineIntel-6-37,V14,/SLM/events/Silvermont_matrix.json,offcore,,,
GenuineIntel-6-4A,V14,/SLM/events/Silvermont_core.json,core,,,
GenuineIntel-6-4A,V14,/SLM/events/Silvermont_matrix.json,offcore,,,
GenuineIntel-6-4D,V14,/SLM/events/Silvermont_core.json,core,,
GenuineIntel-6-4D,V14,/SLM/events/Silvermont_matrix.json,offcore,,,
GenuineIntel-6-4C,V14,/SLM/events/Silvermont_core.json,core,,,
GenuineIntel-6-4C,V14,/SLM/events/Silvermont_matrix.json,offcore,,,
GenuineIntel-6-5A,V14,/SLM/events/Silvermont_core.json,core,,,
GenuineIntel-6-5A,V14,/SLM/events/Silvermont_matrix.json,offcore,,,
GenuineIntel-6-5C,V13,/GLM/events/goldmont_core.json,core,,,
GenuineIntel-6-5C,V13,/GLM/events/goldmont_matrix.json,offcore,,,
GenuineIntel-6-5F,V13,/GLM/events/goldmont_core.json,core,,,
GenuineIntel-6-5F,V13,/GLM/events/goldmont_matrix.json,offcore,,,
GenuineIntel-6-1C,V4,/BNL/events/Bonnell_core.json,core,,,
GenuineIntel-6-26,V4,/BNL/events/Bonnell_core.json,core,,,
GenuineIntel-6-27,V4,/BNL/events/Bonnell_core.json,core,,,
GenuineIntel-6-36,V4,/BNL/events/Bonnell_core.json,core,,,
GenuineIntel-6-35,V4,/BNL/events/Bonnell_core.json,core,,,
GenuineIntel-6-2A,V17,/SNB/events/sandybridge_core.json,core,,,
GenuineIntel-6-2A,V17,/SNB/events/sandybridge_matrix.json,offcore,,,
GenuineIntel-6-2A,V17,/SNB/events/sandybridge_uncore.json,uncore,,,
GenuineIntel-6-2D,V21,/JKT/events/Jaketown_core.json,core,,,
GenuineIntel-6-2D,V21,/JKT/events/Jaketown_matrix.json,offcore,,,
GenuineIntel-6-2D,V21,/JKT/events/Jaketown_uncore.json,uncore,,,
GenuineIntel-6-3A,V23,/IVB/events/ivybridge_core.json,core,,,
GenuineIntel-6-3A,V23,/IVB/events/ivybridge_matrix.json,offcore,,,
GenuineIntel-6-3A,V23,/IVB/events/ivybridge_uncore.json,uncore,,,
GenuineIntel-6-3E,V22,/IVT/events/ivytown_core.json,core,,,
GenuineIntel-6-3E,V22,/IVT/events/ivytown_matrix.json,offcore,,,
GenuineIntel-6-3E,V22,/IVT/events/ivytown_uncore.json,uncore,,,
GenuineIntel-6-3C,V32,/HSW/events/haswell_core.json,core,,,
GenuineIntel-6-45,V32,/HSW/events/haswell_core.json,core,,,
GenuineIntel-6-46,V32,/HSW/events/haswell_core.json,core,,,
GenuineIntel-6-3C,V32,/HSW/events/haswell_matrix.json,offcore,,,
GenuineIntel-6-45,V32,/HSW/events/haswell_matrix.json,offcore,,,
GenuineIntel-6-46,V32,/HSW/events/haswell_matrix.json,offcore,,,
GenuineIntel-6-3C,V32,/HSW/events/haswell_uncore.json,uncore,,,
GenuineIntel-6-45,V32,/HSW/events/haswell_uncore.json,uncore,,,
GenuineIntel-6-46,V32,/HSW/events/haswell_uncore.json,uncore,,,
GenuineIntel-6-3F,V26,/HSX/events/haswellx_core.json,core,,,
GenuineIntel-6-3F,V26,/HSX/events/haswellx_matrix.json,offcore,,,
GenuineIntel-6-3F,V26,/HSX/events/haswellx_uncore.json,uncore,,,
GenuineIntel-6-3D,V26,/BDW/events/broadwell_core.json,core,,,
GenuineIntel-6-3D,V26,/BDW/events/broadwell_matrix.json,offcore,,,
GenuineIntel-6-3D,V26,/BDW/events/broadwell_uncore.json,uncore,,,
GenuineIntel-6-3D,V26,/BDW/events/broadwell_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-47,V26,/BDW/events/broadwell_core.json,core,,,
GenuineIntel-6-47,V26,/BDW/events/broadwell_matrix.json,offcore,,,
GenuineIntel-6-47,V26,/BDW/events/broadwell_uncore.json,uncore,,,
GenuineIntel-6-47,V26,/BDW/events/broadwell_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-4F,V19,/BDX/events/broadwellx_core.json,core,,,
GenuineIntel-6-4F,V19,/BDX/events/broadwellx_matrix.json,offcore,,,
GenuineIntel-6-4F,V19,/BDX/events/broadwellx_uncore.json,uncore,,,
GenuineIntel-6-56,V7,/BDW-DE/events/broadwellde_core.json,core,,,
GenuineIntel-6-56,V7,/BDW-DE/events/broadwellde_uncore.json,uncore,,,
GenuineIntel-6-4E,V53,/SKL/events/skylake_core.json,core,,,
GenuineIntel-6-5E,V53,/SKL/events/skylake_core.json,core,,,
GenuineIntel-6-4E,V53,/SKL/events/skylake_matrix.json,offcore,,,
GenuineIntel-6-5E,V53,/SKL/events/skylake_matrix.json,offcore,,,
GenuineIntel-6-4E,V53,/SKL/events/skylake_uncore.json,uncore,,,
GenuineIntel-6-5E,V53,/SKL/events/skylake_uncore.json,uncore,,,
GenuineIntel-6-4E,V53,/SKL/events/skylake_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-5E,V53,/SKL/events/skylake_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-8E,V53,/SKL/events/skylake_core.json,core,,,
GenuineIntel-6-9E,V53,/SKL/events/skylake_core.json,core,,,
GenuineIntel-6-8E,V53,/SKL/events/skylake_matrix.json,offcore,,,
GenuineIntel-6-9E,V53,/SKL/events/skylake_matrix.json,offcore,,,
GenuineIntel-6-8E,V53,/SKL/events/skylake_uncore.json,uncore,,,
GenuineIntel-6-9E,V53,/SKL/events/skylake_uncore.json,uncore,,,
GenuineIntel-6-8E,V53,/SKL/events/skylake_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-9E,V53,/SKL/events/skylake_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-A5,V53,/SKL/events/skylake_core.json,core,,,
GenuineIntel-6-A6,V53,/SKL/events/skylake_core.json,core,,,
GenuineIntel-6-A5,V53,/SKL/events/skylake_matrix.json,offcore,,,
GenuineIntel-6-A6,V53,/SKL/events/skylake_matrix.json,offcore,,,
GenuineIntel-6-A5,V53,/SKL/events/skylake_uncore.json,uncore,,,
GenuineIntel-6-A6,V53,/SKL/events/skylake_uncore.json,uncore,,,
GenuineIntel-6-A5,V53,/SKL/events/skylake_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-A6,V53,/SKL/events/skylake_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-57,V9,/KNL/events/KnightsLanding_core.json,core,,,
GenuineIntel-6-57,V9,/KNL/events/KnightsLanding_matrix.json,offcore,,,
GenuineIntel-6-57,V9,/KNL/events/KnightsLanding_uncore.json,uncore,,,
GenuineIntel-6-85,V9,/KNM/events/KnightsLanding_core.json,core,,,
GenuineIntel-6-85,V9,/KNM/events/KnightsLanding_matrix.json,offcore,,,
GenuineIntel-6-85,V9,/KNM/events/KnightsLanding_uncore.json,uncore,,,
GenuineIntel-6-55-[01234],V1.28,/SKX/events/skylakex_core.json,core,,,
GenuineIntel-6-55-[01234],V1.28,/SKX/events/skylakex_matrix.json,offcore,,,
GenuineIntel-6-55-[01234],V1.28,/SKX/events/skylakex_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-55-[01234],V1.28,/SKX/events/skylakex_uncore.json,uncore,,,
GenuineIntel-6-55-[01234],V1.28,/SKX/events/skylakex_uncore_experimental.json,uncore experimental,,,
GenuineIntel-6-55-[56789ABCDEF],V1.16,/CLX/events/cascadelakex_core.json,core,,,
GenuineIntel-6-55-[56789ABCDEF],V1.16,/CLX/events/cascadelakex_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-55-[56789ABCDEF],V1.16,/CLX/events/cascadelakex_uncore.json,uncore,,,
GenuineIntel-6-55-[56789ABCDEF],V1.16,/CLX/events/cascadelakex_uncore_experimental.json,uncore experimental,,,
GenuineIntel-6-7A,V1.01,/GLP/events/goldmontplus_core.json,core,,,
GenuineIntel-6-7A,V1.01,/GLP/events/goldmontplus_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-7A,V1.01,/GLP/events/goldmontplus_matrix.json,offcore,,,
GenuineIntel-6-7D,V1.15,/ICL/events/icelake_core.json,core,,,
GenuineIntel-6-7D,V1.15,/ICL/events/icelake_uncore.json,uncore,,,
GenuineIntel-6-7E,V1.15,/ICL/events/icelake_core.json,core,,,
GenuineIntel-6-7E,V1.15,/ICL/events/icelake_uncore.json,uncore,,,
GenuineIntel-6-A7,V1.15,/ICL/events/icelake_core.json,core,,,
GenuineIntel-6-A7,V1.15,/ICL/events/icelake_uncore.json,uncore,,,
GenuineIntel-6-86,V1.20,/SNR/events/snowridgex_core.json,core,,,
GenuineIntel-6-86,V1.20,/SNR/events/snowridgex_uncore.json,uncore,,,
GenuineIntel-6-86,V1.20,/SNR/events/snowridgex_uncore_experimental.json,uncore experimental,,,
GenuineIntel-6-8C,V1.08,/TGL/events/tigerlake_core.json,core,,,
GenuineIntel-6-8D,V1.08,/TGL/events/tigerlake_core.json,core,,,
GenuineIntel-6-8C,V1.08,/TGL/events/tigerlake_uncore.json,uncore,,,
GenuineIntel-6-8D,V1.08,/TGL/events/tigerlake_uncore.json,uncore,,,
GenuineIntel-6-8C,V1.08,/TGL/events/tigerlake_uncore_experimental.json,uncore experimental,,,
GenuineIntel-6-8D,V1.08,/TGL/events/tigerlake_uncore_experimental.json,uncore experimental,,,
GenuineIntel-6-8F,V1.09,/SPR/events/sapphirerapids_core.json,core,,,
GenuineIntel-6-8F,V1.09,/SPR/events/sapphirerapids_uncore.json,uncore,,,
GenuineIntel-6-8F,V1.09,/SPR/events/sapphirerapids_uncore_experimental.json,uncore experimental,,,
GenuineIntel-6-6A,V1.17,/ICX/events/icelakex_core.json,core,,,
GenuineIntel-6-6A,V1.17,/ICX/events/icelakex_uncore.json,uncore,,,
GenuineIntel-6-6A,V1.17,/ICX/events/icelakex_uncore_experimental.json,uncore experimental,,,
GenuineIntel-6-6C,V1.17,/ICX/events/icelakex_core.json,core,,,
GenuineIntel-6-6C,V1.17,/ICX/events/icelakex_uncore.json,uncore,,,
GenuineIntel-6-96,V1.03,/EHL/events/elkhartlake_core.json,core,,,
GenuineIntel-6-9C,V1.03,/EHL/events/elkhartlake_core.json,core,,,
GenuineIntel-6-97,V1.16,/ADL/events/alderlake_gracemont_core.json,hybridcore,0x20,0x000001,Atom
GenuineIntel-6-97,V1.16,/ADL/events/alderlake_goldencove_core.json,hybridcore,0x40,0x000001,Core
GenuineIntel-6-97,V1.16,/ADL/events/alderlake_uncore.json,uncore,,,
GenuineIntel-6-97,V1.16,/ADL/events/alderlake_uncore_experimental.json,uncore experimental,,,
GenuineIntel-6-9A,V1.16,/ADL/events/alderlake_gracemont_core.json,hybridcore,0x20,0x000001,Atom
GenuineIntel-6-9A,V1.16,/ADL/events/alderlake_goldencove_core.json,hybridcore,0x40,0x000001,Core
GenuineIntel-6-9A,V1.16,/ADL/events/alderlake_uncore.json,uncore,,,
GenuineIntel-6-9A,V1.16,/ADL/events/alderlake_uncore_experimental.json,uncore experimental,,,
GenuineIntel-6-B7,V1.16,/ADL/events/alderlake_gracemont_core.json,hybridcore,0x20,0x000001,Atom
GenuineIntel-6-B7,V1.16,/ADL/events/alderlake_goldencove_core.json,hybridcore,0x40,0x000001,Core
GenuineIntel-6-B7,V1.16,/ADL/events/alderlake_uncore.json,uncore,,,
GenuineIntel-6-B7,V1.16,/ADL/events/alderlake_uncore_experimental.json,uncore experimental,,,
GenuineIntel-6-BA,V1.16,/ADL/events/alderlake_gracemont_core.json,hybridcore,0x20,0x000001,Atom
GenuineIntel-6-BA,V1.16,/ADL/events/alderlake_goldencove_core.json,hybridcore,0x40,0x000001,Core
GenuineIntel-6-BA,V1.16,/ADL/events/alderlake_uncore.json,uncore,,,
GenuineIntel-6-BA,V1.16,/ADL/events/alderlake_uncore_experimental.json,uncore experimental,,,
GenuineIntel-6-BF,V1.16,/ADL/events/alderlake_gracemont_core.json,hybridcore,0x20,0x000001,Atom
GenuineIntel-6-BF,V1.16,/ADL/events/alderlake_goldencove_core.json,hybridcore,0x40,0x000001,Core
GenuineIntel-6-BF,V1.16,/ADL/events/alderlake_uncore.json,uncore,,,
GenuineIntel-6-BF,V1.16,/ADL/events/alderlake_uncore_experimental.json,uncore experimental,,,
GenuineIntel-6-BE,V1.16,/ADL/events/alderlake_gracemont_core.json,core,,,
GenuineIntel-6-BE,V1.16,/ADL/events/alderlake_uncore.json,uncore,,,
GenuineIntel-6-AA,V1.00,/MTL/events/meteorlake_crestmont_core.json,hybridcore,0x20,0x000002,Atom
GenuineIntel-6-AA,V1.00,/MTL/events/meteorlake_redwoodcove_core.json,hybridcore,0x40,0x000002,Core
GenuineIntel-6-AC,V1.00,/MTL/events/meteorlake_crestmont_core.json,hybridcore,0x20,0x000002,Atom
GenuineIntel-6-AC,V1.00,/MTL/events/meteorlake_redwoodcove_core.json,hybridcore,0x40,0x000002,Core
GenuineIntel-6-AD,V1.00,/GNR/events/graniterapids_core.json,core,,,
GenuineIntel-6-AE,V1.00,/GNR/events/graniterapids_core.json,core,,,
Original file line number Diff line number Diff line change
@@ -0,0 +1,11 @@
{
"Header": {
"Copyright": "",
"Info": "Placeholder core event file.",
"DatePublished": "",
"Version": "",
"Legend": ""
},
"Events": [
]
}
Original file line number Diff line number Diff line change
@@ -0,0 +1,11 @@
{
"Header": {
"Copyright": "",
"Info": "Placeholder uncore event file.",
"DatePublished": "",
"Version": "",
"Legend": ""
},
"Events": [
]
}
Original file line number Diff line number Diff line change
@@ -0,0 +1,4 @@
Family-model,Version,Filename,EventType,Core Type,Native Model ID,Core Role Name
GenuineIntel-6-8F,V1.09,/SPR/events/sapphirerapids_core.json,core,,,
GenuineIntel-6-8F,V1.09,/SPR/events/sapphirerapids_uncore.json,uncore,,,
GenuineIntel-6-8F,V1.09,/SPR/events/sapphirerapids_uncore_experimental.json,uncore experimental,,,
Original file line number Diff line number Diff line change
@@ -0,0 +1,11 @@
{
"Header": {
"Copyright": "",
"Info": "Placeholder core event file.",
"DatePublished": "",
"Version": "1.09",
"Legend": ""
},
"Events": [
]
}
Original file line number Diff line number Diff line change
@@ -0,0 +1,11 @@
{
"Header": {
"Copyright": "",
"Info": "Placeholder uncore event file.",
"DatePublished": "",
"Version": "1.09",
"Legend": ""
},
"Events": [
]
}
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