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Started adding ESP32-H2 support (esp-rs#482)
* Update `esp-hal-procmacros` and `esp-hal-smartled` packages to support H2 * Get scaffolding in place to get `esp-hal-common` building with `esp32h2` feature * Made some progress, some aside functions are already done, bbpll configure builds, problem with 3 registers * More progress, all necessary functions are implemented (not every was verified). Next step - test on HW * added bus update to function * add esp32h2-hal package * remove offset for ROM (maybe temporarly) * comment yet unimplemented includes * Provided (COMPLETELY NOT SURE if it's a real solution) * defined interrupt_map_base * fix typo * Implemented boot_defaults and configure functions for clock * Not providing _start_trap_rust_hal to the linker manually now * Typo: delete comment * Cleaning code(1): Removed unnecessary moves, registers, addresses, functions * Remove irrelevant comments * Enable interrupt peripherals * Fix errors, wrong addresses and offsets. Added new CpuClock mode for esp32h2 * Added bus update, enabling and setting i2c mst clk frequency, deleted irrelevant comments * fix CpuControl::start_app_core signature (esp-rs#466) * Minor linker script additions * Use correct linker script comment style * get_wakeup_cause: fix comparison error * Use 192 as mclk_multiple for 24-bit I2S * use bitflags to decode wakeup cause (esp-rs#473) * get_wakeup_cause: use bitflags instead of cast, & * get_wakeup_cause: bitflags for other cpus * rsa peripheral support (esp-rs#467) * Added software interrupt API, examples for all of the MCUs * Added software interrupt API, examples for all of the MCUs * Pin nightly to 2023-03-09 to workaround a problem with embedded-hal-async in CI * Fixed comments * Fixed comments * Fixed comments * Get scaffolding in place to get `esp-hal-common` building with `esp32h2` feature * Updated Cargo.toml * Added esp32h2-hal and other ESP32-H2 to CI workflow * Fix Cargo.toml and add a simple hello_world example * ci: Fix indentation * Update esp-backtrace version in Cargo.toml * Adjust for rustfmt * Adjust for rustfmt * Adjust for rustfmt * Deleted irrelevant comments, fixed wrong i2c_clock frequency * Update esp-hal-common/Cargo.toml Co-authored-by: Jesse Braham <jessebraham@users.noreply.github.com> * Populated SocResetReason to get get_wakeup_cause function working * Update esp-hal-common/src/clock/clocks_ll/esp32h2.rs Co-authored-by: Jesse Braham <jessebraham@users.noreply.github.com> * PAC has been updated, should be working now --------- Co-authored-by: Jesse Braham <jesse@beta7.io> Co-authored-by: dimpolo <33688001+dimpolo@users.noreply.github.com> Co-authored-by: bjoernQ <bjoern.quentin@mobile-j.de> Co-authored-by: Christopher Liebman <liebman@zod.com> Co-authored-by: Josh Weberruss <joshua.weberruss@gmail.com> Co-authored-by: sreehari prasad <52113972+matrixhead@users.noreply.github.com> Co-authored-by: onsdagens <pawdzi-7@student.ltu.se> Co-authored-by: Sergio Gasquez Arcos <sergio.gasquez@gmail.com> Co-authored-by: Jesse Braham <jessebraham@users.noreply.github.com>
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[device] | ||
arch = "riscv" | ||
cores = "single_core" | ||
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peripherals = [ | ||
# Peripherals available in the PAC: | ||
# "aes", | ||
# "apb_saradc", | ||
# "assist_debug", | ||
# "ds", | ||
# "ecc", | ||
"efuse", | ||
# "gdma", | ||
# "gpio", | ||
# "hmac", | ||
# "hp_apm", | ||
# "hp_sys", | ||
# "i2c0", | ||
# "i2c1", | ||
# "i2s0", | ||
"interrupt_core0", | ||
"intpri", | ||
# "io_mux", | ||
# "ledc", | ||
# "lp_ana", | ||
# "lp_aon", | ||
# "lp_apm", | ||
"lp_clkrst", | ||
# "lp_peri", | ||
# "lp_timer", | ||
"lp_wdt", | ||
# "mcpwm0", | ||
# "mem_monitor", | ||
# "modem_lpcon", | ||
# "modem_syscon", | ||
# "otp_debug", | ||
# "parl_io", | ||
# "pau", | ||
# "pcnt", | ||
"pcr", | ||
# "pmu", | ||
# "peripherals", | ||
# "rmt", | ||
# "rng", | ||
# "rsa", | ||
# "sha", | ||
# "soc_etm", | ||
# "spi0", | ||
# "spi1", | ||
# "spi2", | ||
# "systimer", | ||
# "tee", | ||
# "timg0", | ||
# "timg1", | ||
# "trace", | ||
# "twai0", | ||
# "uart0", | ||
# "uart1", | ||
# "uhci0", | ||
# "usb_device", | ||
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# Additional peripherals defined by us (the developers): | ||
"plic", | ||
] |
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