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[Perf]Polish UniformRandom And Split it into ScheduleBlock (PaddlePad…
…dle#1357) 本PR因和paddle联编测试需两边修改，现CINN强行合入，待Paddle对应PR合入后CI可正常。
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| Original file line number | Diff line number | Diff line change |
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| @@ -0,0 +1,37 @@ | ||
| // Copyright (c) 2022 CINN Authors. All Rights Reserved. | ||
| // | ||
| // Licensed under the Apache License, Version 2.0 (the "License"); | ||
| // you may not use this file except in compliance with the License. | ||
| // You may obtain a copy of the License at | ||
| // | ||
| // http://www.apache.org/licenses/LICENSE-2.0 | ||
| // | ||
| // Unless required by applicable law or agreed to in writing, software | ||
| // distributed under the License is distributed on an "AS IS" BASIS, | ||
| // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| // See the License for the specific language governing permissions and | ||
| // limitations under the License. | ||
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| #pragma once | ||
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| #include <string> | ||
| #include <vector> | ||
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| #include "cinn/ir/ir.h" | ||
| #include "cinn/ir/ir_base.h" | ||
| #include "cinn/ir/tensor.h" | ||
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| namespace cinn { | ||
| namespace hlir { | ||
| namespace op { | ||
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| // Only for min = 0. and max = 1. | ||
| ir::Tensor UniformRandom(const std::vector<int>& shape, | ||
| int seed, | ||
| const std::string& dtype, | ||
| const Target& target, | ||
| const std::string& tensor_name); | ||
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| } // namespace op | ||
| } // namespace hlir | ||
| } // namespace cinn |
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| Original file line number | Diff line number | Diff line change |
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| @@ -0,0 +1,167 @@ | ||
| // Copyright (c) 2022 CINN Authors. All Rights Reserved. | ||
| // | ||
| // Licensed under the Apache License, Version 2.0 (the "License"); | ||
| // you may not use this file except in compliance with the License. | ||
| // You may obtain a copy of the License at | ||
| // | ||
| // http://www.apache.org/licenses/LICENSE-2.0 | ||
| // | ||
| // Unless required by applicable law or agreed to in writing, software | ||
| // distributed under the License is distributed on an "AS IS" BASIS, | ||
| // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| // See the License for the specific language governing permissions and | ||
| // limitations under the License. | ||
| #include "cinn/hlir/op/contrib/uniform_random.h" | ||
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| #include <glog/logging.h> | ||
| #include <gtest/gtest.h> | ||
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| #include <string> | ||
| #include <vector> | ||
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| #include "cinn/backends/codegen_c.h" | ||
| #include "cinn/backends/codegen_c_x86.h" | ||
| #include "cinn/backends/codegen_cuda_dev.h" | ||
| #include "cinn/backends/codegen_cuda_util.h" | ||
| #include "cinn/common/context.h" | ||
| #include "cinn/frontend/net_builder.h" | ||
| #include "cinn/frontend/optimize.h" | ||
| #include "cinn/hlir/framework/graph.h" | ||
| #include "cinn/hlir/framework/graph_compiler.h" | ||
| #include "cinn/lang/lower.h" | ||
| #include "cinn/lang/placeholder.h" | ||
| #include "cinn/poly/stage.h" | ||
| #include "cinn/utils/data_util.h" | ||
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| namespace cinn { | ||
| namespace hlir { | ||
| namespace op { | ||
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| #ifdef CINN_WITH_CUDA | ||
| TEST(GenerateCode_CUDA, UniformRandomGPU) { | ||
| common::Context::Global().ResetNameId(); | ||
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| common::Target target = common::DefaultNVGPUTarget(); | ||
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| std::vector<int> shape = {128, 12}; | ||
| int seed = 2023; | ||
| std::string dtype = "float32"; | ||
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| ir::Tensor res = UniformRandom(shape, seed, dtype, target, "uniform_random_out"); | ||
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| poly::StageMap stages = poly::CreateStages({res}); | ||
| std::vector<ir::LoweredFunc> funcs = | ||
| lang::LowerVec("TestGenerateCodeGPU_UniformRandom", stages, {res}, {}, {}, nullptr, target, true); | ||
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| VLOG(6) << "Expr before CUDA codegen:"; | ||
| VLOG(6) << funcs[0]->body; | ||
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| ir::Module::Builder builder("UniformRandom_Module", target); | ||
| for (auto& f : funcs) { | ||
| builder.AddFunction(f); | ||
| } | ||
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| auto module = builder.Build(); | ||
| auto host_module_device_module = backends::SplitCudaAndHostModule(module); // NOLINT | ||
| auto& host_module = std::get<0>(host_module_device_module); | ||
| auto& device_module = std::get<1>(host_module_device_module); | ||
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| backends::CodeGenCUDA_Dev codegen(target); | ||
| std::string source_code = codegen.Compile(device_module); | ||
| LOG(INFO) << "compiled code:\n" << source_code; | ||
| } | ||
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| } // namespace op | ||
| } // namespace hlir | ||
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| namespace frontend { | ||
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| TEST(Builder, UniformRandomFP32) { | ||
| NetBuilder builder("net_builder"); | ||
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| std::vector<int> shape = {128, 12, 128, 128}; | ||
| int seed = 2023; | ||
| std::string dtype = "float32"; | ||
| auto out = builder.UniformRandom(shape, 0., 1., seed, dtype); | ||
| auto program = builder.Build(); | ||
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| for (int i = 0; i < program.size(); ++i) { | ||
| LOG(INFO) << "instruction: " << program[i]; | ||
| } | ||
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| Target target = common::DefaultNVGPUTarget(); | ||
| std::unordered_set<std::string> fetch_ids; | ||
| auto graph = Optimize(&program, fetch_ids, target); | ||
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| LOG(INFO) << "graph: \n" << graph->Visualize(); | ||
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| auto scope = BuildScope(target, graph); | ||
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| hlir::framework::GraphCompiler gc(target, scope, graph); | ||
| auto runtime_program = gc.Build(); | ||
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| auto out_ten = scope->GetTensor(std::string(out->id)); | ||
| runtime_program->Execute(); | ||
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| EXPECT_EQ(out_ten->type(), Float(32)); | ||
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| std::vector<float> data = GetTensorData<float>(out_ten, target); | ||
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| int cnt = 0; | ||
| for (int i = 0; i < 128 * 12 * 128 * 128; ++i) { | ||
| if (data[i] > 0.5) cnt++; | ||
| } | ||
| float ratio = (float)cnt / (128 * 12 * 128 * 128); | ||
| LOG(INFO) << "count: " << cnt; | ||
| LOG(INFO) << "x > 0.5f ratio: " << ratio; | ||
| EXPECT_LE(ratio, 0.501f); | ||
| EXPECT_GE(ratio, 0.499f); | ||
| } | ||
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| TEST(Builder, UniformRandomFP64) { | ||
| NetBuilder builder("net_builder"); | ||
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| std::vector<int> shape = {128, 12, 128, 128}; | ||
| int seed = 2023; | ||
| std::string dtype = "float64"; | ||
| auto out = builder.UniformRandom(shape, 0., 1., seed, dtype); | ||
| auto program = builder.Build(); | ||
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| for (int i = 0; i < program.size(); ++i) { | ||
| LOG(INFO) << "instruction: " << program[i]; | ||
| } | ||
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| Target target = common::DefaultNVGPUTarget(); | ||
| std::unordered_set<std::string> fetch_ids; | ||
| auto graph = Optimize(&program, fetch_ids, target); | ||
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| LOG(INFO) << "graph: \n" << graph->Visualize(); | ||
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| auto scope = BuildScope(target, graph); | ||
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| hlir::framework::GraphCompiler gc(target, scope, graph); | ||
| auto runtime_program = gc.Build(); | ||
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| auto out_ten = scope->GetTensor(std::string(out->id)); | ||
| runtime_program->Execute(); | ||
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| EXPECT_EQ(out_ten->type(), Float(64)); | ||
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| std::vector<double> data = GetTensorData<double>(out_ten, target); | ||
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| int cnt = 0; | ||
| for (int i = 0; i < 128 * 12 * 128 * 128; ++i) { | ||
| if (data[i] > 0.5) cnt++; | ||
| } | ||
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| float ratio = (float)cnt / (128 * 12 * 128 * 128); | ||
| LOG(INFO) << "count: " << cnt; | ||
| LOG(INFO) << "x > 0.5f ratio: " << ratio; | ||
| EXPECT_LE(ratio, 0.501f); | ||
| EXPECT_GE(ratio, 0.499f); | ||
| } | ||
| #endif | ||
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| } // namespace frontend | ||
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| } // namespace cinn |
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