I obtained my Ph.D. and B.S. in CSE from CUHK and SJTU respectively. My research interests is physical design for ASICs and FPGAs.
- Shanghai, China
- cwpui.com
Highlights
- Pro
Pinned Loading
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cuhk-eda/ripple-fpga
cuhk-eda/ripple-fpga PublicRippleFPGA, A Simultaneous Pack-and-Place Algorithm for UltraScale FPGA
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cuhk-eda/dr-cu
cuhk-eda/dr-cu PublicDr. CU, VLSI Detailed Routing Tool Developed by CUHK
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cuhk-eda/ripple
cuhk-eda/ripple PublicPin-Accessible Legalization for Mixed-Cell-Height Circuits
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