Table of Contents
- About The Workshop
- Day-1: Inception of open-source EDA, OpenLane and Sky130 PDK
- Day-2: Good floorplan vs bad floorplan and introduction to library cells
- Acknowledgements
This project gives an interactive tutorial experied during the VSD Advanced Physical Design workshop using OpenLane.
OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, CVC, SPEF-Extractor, KLayout and a number of custom scripts for design exploration and optimization. The flow performs all ASIC implementation steps from RTL all the way down to GDSII.