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Update target_feature syntax (rust-lang#283)
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This commit updates to the latest nightly's syntax where `#[target_feature =
"+foo"]` is now deprecated in favor of `#[target_feature(enable = "foo")]`.
Additionally `#[target_feature]` can only be applied to `unsafe` functions for
now.

Along the way this removes a few exampels that were just left around and also
disables the `fxsr` modules as that target feature will need to land in upstream
rust-lang/rust first as it's currently unknown to the compiler.
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alexcrichton authored Jan 17, 2018
1 parent c14f4d2 commit b2f7be2
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Showing 38 changed files with 1,112 additions and 1,180 deletions.
8 changes: 4 additions & 4 deletions coresimd/src/aarch64/neon.rs
Original file line number Diff line number Diff line change
Expand Up @@ -9,31 +9,31 @@ use v128::f64x2;

/// Vector add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(fadd))]
pub unsafe fn vadd_f64(a: f64, b: f64) -> f64 {
a + b
}

/// Vector add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(fadd))]
pub unsafe fn vaddq_f64(a: f64x2, b: f64x2) -> f64x2 {
simd_add(a, b)
}

/// Vector add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(add))]
pub unsafe fn vaddd_s64(a: i64, b: i64) -> i64 {
a + b
}

/// Vector add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(add))]
pub unsafe fn vaddd_u64(a: u64, b: u64) -> u64 {
a + b
Expand Down
46 changes: 23 additions & 23 deletions coresimd/src/arm/neon.rs
Original file line number Diff line number Diff line change
Expand Up @@ -10,135 +10,135 @@ use v128::{f32x4, i16x8, i32x4, i64x2, i8x16, u16x8, u32x4, u64x2, u8x16};

/// Vector add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(add))]
pub unsafe fn vadd_s8(a: i8x8, b: i8x8) -> i8x8 {
simd_add(a, b)
}

/// Vector add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(add))]
pub unsafe fn vaddq_s8(a: i8x16, b: i8x16) -> i8x16 {
simd_add(a, b)
}

/// Vector add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(add))]
pub unsafe fn vadd_s16(a: i16x4, b: i16x4) -> i16x4 {
simd_add(a, b)
}

/// Vector add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(add))]
pub unsafe fn vaddq_s16(a: i16x8, b: i16x8) -> i16x8 {
simd_add(a, b)
}

/// Vector add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(add))]
pub unsafe fn vadd_s32(a: i32x2, b: i32x2) -> i32x2 {
simd_add(a, b)
}

/// Vector add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(add))]
pub unsafe fn vaddq_s32(a: i32x4, b: i32x4) -> i32x4 {
simd_add(a, b)
}

/// Vector add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(add))]
pub unsafe fn vaddq_s64(a: i64x2, b: i64x2) -> i64x2 {
simd_add(a, b)
}

/// Vector add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(add))]
pub unsafe fn vadd_u8(a: u8x8, b: u8x8) -> u8x8 {
simd_add(a, b)
}

/// Vector add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(add))]
pub unsafe fn vaddq_u8(a: u8x16, b: u8x16) -> u8x16 {
simd_add(a, b)
}

/// Vector add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(add))]
pub unsafe fn vadd_u16(a: u16x4, b: u16x4) -> u16x4 {
simd_add(a, b)
}

/// Vector add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(add))]
pub unsafe fn vaddq_u16(a: u16x8, b: u16x8) -> u16x8 {
simd_add(a, b)
}

/// Vector add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(add))]
pub unsafe fn vadd_u32(a: u32x2, b: u32x2) -> u32x2 {
simd_add(a, b)
}

/// Vector add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(add))]
pub unsafe fn vaddq_u32(a: u32x4, b: u32x4) -> u32x4 {
simd_add(a, b)
}

/// Vector add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(add))]
pub unsafe fn vaddq_u64(a: u64x2, b: u64x2) -> u64x2 {
simd_add(a, b)
}

/// Vector add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(fadd))]
pub unsafe fn vadd_f32(a: f32x2, b: f32x2) -> f32x2 {
simd_add(a, b)
}

/// Vector add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(fadd))]
pub unsafe fn vaddq_f32(a: f32x4, b: f32x4) -> f32x4 {
simd_add(a, b)
}

/// Vector long add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(saddl))]
pub unsafe fn vaddl_s8(a: i8x8, b: i8x8) -> i16x8 {
let a = a.as_i16x8();
Expand All @@ -148,7 +148,7 @@ pub unsafe fn vaddl_s8(a: i8x8, b: i8x8) -> i16x8 {

/// Vector long add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(saddl))]
pub unsafe fn vaddl_s16(a: i16x4, b: i16x4) -> i32x4 {
let a = a.as_i32x4();
Expand All @@ -158,7 +158,7 @@ pub unsafe fn vaddl_s16(a: i16x4, b: i16x4) -> i32x4 {

/// Vector long add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(saddl))]
pub unsafe fn vaddl_s32(a: i32x2, b: i32x2) -> i64x2 {
let a = a.as_i64x2();
Expand All @@ -168,7 +168,7 @@ pub unsafe fn vaddl_s32(a: i32x2, b: i32x2) -> i64x2 {

/// Vector long add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(uaddl))]
pub unsafe fn vaddl_u8(a: u8x8, b: u8x8) -> u16x8 {
let a = a.as_u16x8();
Expand All @@ -178,7 +178,7 @@ pub unsafe fn vaddl_u8(a: u8x8, b: u8x8) -> u16x8 {

/// Vector long add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(uaddl))]
pub unsafe fn vaddl_u16(a: u16x4, b: u16x4) -> u32x4 {
let a = a.as_u32x4();
Expand All @@ -188,7 +188,7 @@ pub unsafe fn vaddl_u16(a: u16x4, b: u16x4) -> u32x4 {

/// Vector long add.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(uaddl))]
pub unsafe fn vaddl_u32(a: u32x2, b: u32x2) -> u64x2 {
let a = a.as_u64x2();
Expand All @@ -206,7 +206,7 @@ extern "C" {

/// Reciprocal square-root estimate.
#[inline(always)]
#[target_feature = "+neon"]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(frsqrte))]
pub unsafe fn vrsqrte_f32(a: f32x2) -> f32x2 {
frsqrte_v2f32(a)
Expand Down
4 changes: 3 additions & 1 deletion coresimd/src/arm/v7.rs
Original file line number Diff line number Diff line change
Expand Up @@ -36,7 +36,8 @@ pub unsafe fn _clz_u32(x: u32) -> u32 {
/// Reverse the bit order.
#[inline(always)]
#[cfg_attr(test, assert_instr(rbit))]
#[cfg_attr(target_arch = "arm", target_feature = "+v7")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
#[cfg(dont_compile_me)] // FIXME need to add `v7` upstream in rustc
pub unsafe fn _rbit_u32(x: u32) -> u32 {
rbit_u32(x as i32) as u32
}
Expand Down Expand Up @@ -73,6 +74,7 @@ mod tests {
}

#[test]
#[cfg(dont_compile_me)] // FIXME need to add `v7` upstream in rustc
fn _rbit_u32() {
unsafe {
assert_eq!(
Expand Down
4 changes: 2 additions & 2 deletions coresimd/src/x86/i386/fxsr.rs
Original file line number Diff line number Diff line change
Expand Up @@ -22,7 +22,7 @@ extern "C" {
/// [fxsave]: http://www.felixcloutier.com/x86/FXSAVE.html
/// [fxrstor]: http://www.felixcloutier.com/x86/FXRSTOR.html
#[inline(always)]
#[target_feature = "+fxsr"]
#[target_feature(enable = "fxsr")]
#[cfg_attr(test, assert_instr(fxsave))]
pub unsafe fn _fxsave(mem_addr: *mut u8) {
fxsave(mem_addr)
Expand All @@ -43,7 +43,7 @@ pub unsafe fn _fxsave(mem_addr: *mut u8) {
/// [fxsave]: http://www.felixcloutier.com/x86/FXSAVE.html
/// [fxrstor]: http://www.felixcloutier.com/x86/FXRSTOR.html
#[inline(always)]
#[target_feature = "+fxsr"]
#[target_feature(enable = "fxsr")]
#[cfg_attr(test, assert_instr(fxrstor))]
pub unsafe fn _fxrstor(mem_addr: *const u8) {
fxrstor(mem_addr)
Expand Down
3 changes: 3 additions & 0 deletions coresimd/src/x86/i386/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -3,5 +3,8 @@
mod eflags;
pub use self::eflags::*;


#[cfg(dont_compile_me)] // TODO: need to upstream `fxsr` target feature
mod fxsr;
#[cfg(dont_compile_me)] // TODO: need to upstream `fxsr` target feature
pub use self::fxsr::*;
8 changes: 4 additions & 4 deletions coresimd/src/x86/i586/abm.rs
Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,7 @@ use stdsimd_test::assert_instr;
///
/// When the operand is zero, it returns its size in bits.
#[inline(always)]
#[target_feature = "+lzcnt"]
#[target_feature(enable = "lzcnt")]
#[cfg_attr(test, assert_instr(lzcnt))]
pub unsafe fn _lzcnt_u32(x: u32) -> u32 {
x.leading_zeros()
Expand All @@ -34,23 +34,23 @@ pub unsafe fn _lzcnt_u32(x: u32) -> u32 {
///
/// When the operand is zero, it returns its size in bits.
#[inline(always)]
#[target_feature = "+lzcnt"]
#[target_feature(enable = "lzcnt")]
#[cfg_attr(test, assert_instr(lzcnt))]
pub unsafe fn _lzcnt_u64(x: u64) -> u64 {
x.leading_zeros() as u64
}

/// Counts the bits that are set.
#[inline(always)]
#[target_feature = "+popcnt"]
#[target_feature(enable = "popcnt")]
#[cfg_attr(test, assert_instr(popcnt))]
pub unsafe fn _popcnt32(x: i32) -> i32 {
x.count_ones() as i32
}

/// Counts the bits that are set.
#[inline(always)]
#[target_feature = "+popcnt"]
#[target_feature(enable = "popcnt")]
#[cfg_attr(test, assert_instr(popcnt))]
pub unsafe fn _popcnt64(x: i64) -> i32 {
x.count_ones() as i32
Expand Down
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