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Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | ||
# Copyright 2021-2024 NXP | ||
%YAML 1.2 | ||
--- | ||
$id: http://devicetree.org/schemas/net/nxp,s32-dwmac.yaml# | ||
$schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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title: NXP S32G2xx/S32G3xx/S32R45 GMAC ethernet controller | ||
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maintainers: | ||
- Jan Petrous (OSS) <jan.petrous@oss.nxp.com> | ||
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description: | ||
This device is a Synopsys DWC IP, integrated on NXP S32G/R SoCs. | ||
The SoC series S32G2xx and S32G3xx feature one DWMAC instance, | ||
the SoC S32R45 has two instances. The devices can use RGMII/RMII/MII | ||
interface over Pinctrl device or the output can be routed | ||
to the embedded SerDes for SGMII connectivity. | ||
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properties: | ||
compatible: | ||
oneOf: | ||
- const: nxp,s32g2-dwmac | ||
- items: | ||
- enum: | ||
- nxp,s32g3-dwmac | ||
- nxp,s32r45-dwmac | ||
- const: nxp,s32g2-dwmac | ||
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reg: | ||
items: | ||
- description: Main GMAC registers | ||
- description: GMAC PHY mode control register | ||
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interrupts: | ||
maxItems: 1 | ||
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interrupt-names: | ||
const: macirq | ||
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clocks: | ||
items: | ||
- description: Main GMAC clock | ||
- description: Transmit clock | ||
- description: Receive clock | ||
- description: PTP reference clock | ||
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clock-names: | ||
items: | ||
- const: stmmaceth | ||
- const: tx | ||
- const: rx | ||
- const: ptp_ref | ||
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required: | ||
- clocks | ||
- clock-names | ||
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allOf: | ||
- $ref: snps,dwmac.yaml# | ||
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unevaluatedProperties: false | ||
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examples: | ||
- | | ||
#include <dt-bindings/interrupt-controller/arm-gic.h> | ||
#include <dt-bindings/interrupt-controller/irq.h> | ||
#include <dt-bindings/phy/phy.h> | ||
bus { | ||
#address-cells = <2>; | ||
#size-cells = <2>; | ||
ethernet@4033c000 { | ||
compatible = "nxp,s32g2-dwmac"; | ||
reg = <0x0 0x4033c000 0x0 0x2000>, /* gmac IP */ | ||
<0x0 0x4007c004 0x0 0x4>; /* GMAC_0_CTRL_STS */ | ||
interrupt-parent = <&gic>; | ||
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; | ||
interrupt-names = "macirq"; | ||
snps,mtl-rx-config = <&mtl_rx_setup>; | ||
snps,mtl-tx-config = <&mtl_tx_setup>; | ||
clocks = <&clks 24>, <&clks 17>, <&clks 16>, <&clks 15>; | ||
clock-names = "stmmaceth", "tx", "rx", "ptp_ref"; | ||
phy-mode = "rgmii-id"; | ||
phy-handle = <&phy0>; | ||
mtl_rx_setup: rx-queues-config { | ||
snps,rx-queues-to-use = <5>; | ||
}; | ||
mtl_tx_setup: tx-queues-config { | ||
snps,tx-queues-to-use = <5>; | ||
}; | ||
mdio { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
compatible = "snps,dwmac-mdio"; | ||
phy0: ethernet-phy@0 { | ||
reg = <0>; | ||
}; | ||
}; | ||
}; | ||
}; |
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