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Changes representative of linux-5.14.0-70.26.1.el9_0.tar.xz
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da-x committed Sep 2, 2022
1 parent 61d8c2f commit 4380e54
Showing 153 changed files with 34,709 additions and 11,114 deletions.
3 changes: 3 additions & 0 deletions Documentation/networking/devlink/devlink-params.rst
Original file line number Diff line number Diff line change
@@ -109,6 +109,9 @@ own name.
- Boolean
- When enabled, the device driver will instantiate VDPA networking
specific auxiliary device of the devlink device.
* - ``enable_iwarp``
- Boolean
- Enable handling of iWARP traffic in the device.
* - ``internal_err_reset``
- Boolean
- When enabled, the device driver will reset the device on internal
24 changes: 22 additions & 2 deletions Documentation/networking/devlink/ice.rst
Original file line number Diff line number Diff line change
@@ -26,8 +26,10 @@ The ``ice`` driver reports the following versions
* - ``fw.mgmt``
- running
- 2.1.7
- 3-digit version number of the management firmware that controls the
PHY, link, etc.
- 3-digit version number of the management firmware running on the
Embedded Management Processor of the device. It controls the PHY,
link, access to device resources, etc. Intel documentation refers to
this as the EMP firmware.
* - ``fw.mgmt.api``
- running
- 1.5.1
@@ -119,6 +121,24 @@ preserving settings, and thus ``DEVLINK_FLASH_OVERWRITE_IDENTIFIERS`` on its
own will be rejected. If no overwrite mask is provided, the firmware will be
instructed to preserve all settings and identifying fields when updating.

Reload
======

The ``ice`` driver supports activating new firmware after a flash update
using ``DEVLINK_CMD_RELOAD`` with the ``DEVLINK_RELOAD_ACTION_FW_ACTIVATE``
action.

.. code:: shell
$ devlink dev reload pci/0000:01:00.0 reload action fw_activate
The new firmware is activated by issuing a device specific Embedded
Management Processor reset which requests the device to reset and reload the
EMP firmware image.

The driver does not currently support reloading the driver via
``DEVLINK_RELOAD_ACTION_DRIVER_REINIT``.

Regions
=======

2 changes: 1 addition & 1 deletion Makefile.rhelver
Original file line number Diff line number Diff line change
@@ -12,7 +12,7 @@ RHEL_MINOR = 0
#
# Use this spot to avoid future merge conflicts.
# Do not trim this comment.
RHEL_RELEASE = 70.22.1
RHEL_RELEASE = 70.26.1

#
# ZSTREAM
11 changes: 5 additions & 6 deletions arch/powerpc/kernel/smp.c
Original file line number Diff line number Diff line change
@@ -1567,6 +1567,7 @@ static void add_cpu_to_masks(int cpu)
* add it to it's own thread sibling mask.
*/
cpumask_set_cpu(cpu, cpu_sibling_mask(cpu));
cpumask_set_cpu(cpu, cpu_core_mask(cpu));

for (i = first_thread; i < first_thread + threads_per_core; i++)
if (cpu_online(i))
@@ -1584,11 +1585,6 @@ static void add_cpu_to_masks(int cpu)
if (chip_id_lookup_table && ret)
chip_id = cpu_to_chip_id(cpu);

if (chip_id == -1) {
cpumask_copy(per_cpu(cpu_core_map, cpu), cpu_cpu_mask(cpu));
goto out;
}

if (shared_caches)
submask_fn = cpu_l2_cache_mask;

@@ -1598,6 +1594,10 @@ static void add_cpu_to_masks(int cpu)
/* Skip all CPUs already part of current CPU core mask */
cpumask_andnot(mask, cpu_online_mask, cpu_core_mask(cpu));

/* If chip_id is -1; limit the cpu_core_mask to within DIE*/
if (chip_id == -1)
cpumask_and(mask, mask, cpu_cpu_mask(cpu));

for_each_cpu(i, mask) {
if (chip_id == cpu_to_chip_id(i)) {
or_cpumasks_related(cpu, i, submask_fn, cpu_core_mask);
@@ -1607,7 +1607,6 @@ static void add_cpu_to_masks(int cpu)
}
}

out:
free_cpumask_var(mask);
}

2 changes: 2 additions & 0 deletions arch/x86/include/asm/cpufeatures.h
Original file line number Diff line number Diff line change
@@ -301,7 +301,9 @@
/* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
#define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */
#define X86_FEATURE_AVX512_BF16 (12*32+ 5) /* AVX512 BFLOAT16 instructions */
#define X86_FEATURE_AMX_BF16 (18*32+22) /* AMX bf16 Support */
#define X86_FEATURE_AMX_TILE (18*32+24) /* AMX tile Support */
#define X86_FEATURE_AMX_INT8 (18*32+25) /* AMX int8 Support */

/* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */
#define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */
16 changes: 13 additions & 3 deletions arch/x86/kernel/apic/x2apic_uv_x.c
Original file line number Diff line number Diff line change
@@ -199,7 +199,13 @@ static void __init uv_tsc_check_sync(void)
int mmr_shift;
char *state;

/* Different returns from different UV BIOS versions */
/* UV5 guarantees synced TSCs; do not zero TSC_ADJUST */
if (!is_uv(UV2|UV3|UV4)) {
mark_tsc_async_resets("UV5+");
return;
}

/* UV2,3,4, UV BIOS TSC sync state available */
mmr = uv_early_read_mmr(UVH_TSC_SYNC_MMR);
mmr_shift =
is_uv2_hub() ? UVH_TSC_SYNC_SHIFT_UV2K : UVH_TSC_SYNC_SHIFT;
@@ -1340,7 +1346,7 @@ static void __init decode_gam_params(unsigned long ptr)
static void __init decode_gam_rng_tbl(unsigned long ptr)
{
struct uv_gam_range_entry *gre = (struct uv_gam_range_entry *)ptr;
unsigned long lgre = 0;
unsigned long lgre = 0, gend = 0;
int index = 0;
int sock_min = 999999, pnode_min = 99999;
int sock_max = -1, pnode_max = -1;
@@ -1374,6 +1380,9 @@ static void __init decode_gam_rng_tbl(unsigned long ptr)
flag, size, suffix[order],
gre->type, gre->nasid, gre->sockid, gre->pnode);

if (gre->type == UV_GAM_RANGE_TYPE_HOLE)
gend = (unsigned long)gre->limit << UV_GAM_RANGE_SHFT;

/* update to next range start */
lgre = gre->limit;
if (sock_min > gre->sockid)
@@ -1391,7 +1400,8 @@ static void __init decode_gam_rng_tbl(unsigned long ptr)
_max_pnode = pnode_max;
_gr_table_len = index;

pr_info("UV: GRT: %d entries, sockets(min:%x,max:%x) pnodes(min:%x,max:%x)\n", index, _min_socket, _max_socket, _min_pnode, _max_pnode);
pr_info("UV: GRT: %d entries, sockets(min:%x,max:%x), pnodes(min:%x,max:%x), gap_end(%d)\n",
index, _min_socket, _max_socket, _min_pnode, _max_pnode, fls64(gend));
}

/* Walk through UVsystab decoding the fields */
21 changes: 11 additions & 10 deletions arch/x86/platform/uv/uv_nmi.c
Original file line number Diff line number Diff line change
@@ -244,8 +244,10 @@ static inline bool uv_nmi_action_is(const char *action)
/* Setup which NMI support is present in system */
static void uv_nmi_setup_mmrs(void)
{
bool new_nmi_method_only = false;

/* First determine arch specific MMRs to handshake with BIOS */
if (UVH_EVENT_OCCURRED0_EXTIO_INT0_MASK) {
if (UVH_EVENT_OCCURRED0_EXTIO_INT0_MASK) { /* UV2,3,4 setup */
uvh_nmi_mmrx = UVH_EVENT_OCCURRED0;
uvh_nmi_mmrx_clear = UVH_EVENT_OCCURRED0_ALIAS;
uvh_nmi_mmrx_shift = UVH_EVENT_OCCURRED0_EXTIO_INT0_SHFT;
@@ -255,26 +257,25 @@ static void uv_nmi_setup_mmrs(void)
uvh_nmi_mmrx_req = UVH_BIOS_KERNEL_MMR_ALIAS_2;
uvh_nmi_mmrx_req_shift = 62;

} else if (UVH_EVENT_OCCURRED1_EXTIO_INT0_MASK) {
} else if (UVH_EVENT_OCCURRED1_EXTIO_INT0_MASK) { /* UV5+ setup */
uvh_nmi_mmrx = UVH_EVENT_OCCURRED1;
uvh_nmi_mmrx_clear = UVH_EVENT_OCCURRED1_ALIAS;
uvh_nmi_mmrx_shift = UVH_EVENT_OCCURRED1_EXTIO_INT0_SHFT;
uvh_nmi_mmrx_type = "OCRD1-EXTIO_INT0";

uvh_nmi_mmrx_supported = UVH_EXTIO_INT0_BROADCAST;
uvh_nmi_mmrx_req = UVH_BIOS_KERNEL_MMR_ALIAS_2;
uvh_nmi_mmrx_req_shift = 62;
new_nmi_method_only = true; /* Newer nmi always valid on UV5+ */
uvh_nmi_mmrx_req = 0; /* no request bit to clear */

} else {
pr_err("UV:%s:cannot find EVENT_OCCURRED*_EXTIO_INT0\n",
__func__);
pr_err("UV:%s:NMI support not available on this system\n", __func__);
return;
}

/* Then find out if new NMI is supported */
if (likely(uv_read_local_mmr(uvh_nmi_mmrx_supported))) {
uv_write_local_mmr(uvh_nmi_mmrx_req,
1UL << uvh_nmi_mmrx_req_shift);
if (new_nmi_method_only || uv_read_local_mmr(uvh_nmi_mmrx_supported)) {
if (uvh_nmi_mmrx_req)
uv_write_local_mmr(uvh_nmi_mmrx_req,
1UL << uvh_nmi_mmrx_req_shift);
nmi_mmr = uvh_nmi_mmrx;
nmi_mmr_clear = uvh_nmi_mmrx_clear;
nmi_mmr_pending = 1UL << uvh_nmi_mmrx_shift;
10 changes: 2 additions & 8 deletions block/blk-core.c
Original file line number Diff line number Diff line change
@@ -325,13 +325,6 @@ void blk_queue_start_drain(struct request_queue *q)
wake_up_all(&q->mq_freeze_wq);
}

void blk_set_queue_dying(struct request_queue *q)
{
blk_queue_flag_set(QUEUE_FLAG_DYING, q);
blk_queue_start_drain(q);
}
EXPORT_SYMBOL_GPL(blk_set_queue_dying);

/**
* blk_cleanup_queue - shutdown a request queue
* @q: request queue to shutdown
@@ -349,7 +342,8 @@ void blk_cleanup_queue(struct request_queue *q)
WARN_ON_ONCE(blk_queue_registered(q));

/* mark @q DYING, no new request or merges will be allowed afterwards */
blk_set_queue_dying(q);
blk_queue_flag_set(QUEUE_FLAG_DYING, q);
blk_queue_start_drain(q);

blk_queue_flag_set(QUEUE_FLAG_NOMERGES, q);
blk_queue_flag_set(QUEUE_FLAG_NOXMERGES, q);
20 changes: 14 additions & 6 deletions block/blk-merge.c
Original file line number Diff line number Diff line change
@@ -1092,12 +1092,20 @@ bool blk_attempt_plug_merge(struct request_queue *q, struct bio *bio,
if (!plug || rq_list_empty(plug->mq_list))
return false;

/* check the previously added entry for a quick merge attempt */
rq = rq_list_peek(&plug->mq_list);
if (rq->q == q) {
if (blk_attempt_bio_merge(q, rq, bio, nr_segs, false) ==
BIO_MERGE_OK)
return true;
rq_list_for_each(&plug->mq_list, rq) {
if (rq->q == q) {
if (blk_attempt_bio_merge(q, rq, bio, nr_segs, false) ==
BIO_MERGE_OK)
return true;
break;
}

/*
* Only keep iterating plug list for merges if we have multiple
* queues
*/
if (!plug->multiple_queues)
break;
}
return false;
}
9 changes: 8 additions & 1 deletion block/blk-mq-sched.c
Original file line number Diff line number Diff line change
@@ -206,11 +206,18 @@ static int __blk_mq_do_dispatch_sched(struct blk_mq_hw_ctx *hctx)

static int blk_mq_do_dispatch_sched(struct blk_mq_hw_ctx *hctx)
{
unsigned long end = jiffies + HZ;
int ret;

do {
ret = __blk_mq_do_dispatch_sched(hctx);
} while (ret == 1);
if (ret != 1)
break;
if (need_resched() || time_is_before_jiffies(end)) {
blk_mq_delay_run_hw_queue(hctx, 0);
break;
}
} while (1);

return ret;
}
14 changes: 14 additions & 0 deletions block/genhd.c
Original file line number Diff line number Diff line change
@@ -548,6 +548,20 @@ int device_add_disk(struct device *parent, struct gendisk *disk,
}
EXPORT_SYMBOL(device_add_disk);

/**
* blk_mark_disk_dead - mark a disk as dead
* @disk: disk to mark as dead
*
* Mark as disk as dead (e.g. surprise removed) and don't accept any new I/O
* to this disk.
*/
void blk_mark_disk_dead(struct gendisk *disk)
{
set_bit(GD_DEAD, &disk->state);
blk_queue_start_drain(disk->queue);
}
EXPORT_SYMBOL_GPL(blk_mark_disk_dead);

/**
* del_gendisk - remove the gendisk
* @disk: the struct gendisk to remove
2 changes: 1 addition & 1 deletion drivers/block/mtip32xx/mtip32xx.c
Original file line number Diff line number Diff line change
@@ -4113,7 +4113,7 @@ static void mtip_pci_remove(struct pci_dev *pdev)
"Completion workers still active!\n");
}

blk_set_queue_dying(dd->queue);
blk_mark_disk_dead(dd->disk);
set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag);

/* Clean up the block layer. */
2 changes: 1 addition & 1 deletion drivers/block/rbd.c
Original file line number Diff line number Diff line change
@@ -7186,7 +7186,7 @@ static ssize_t do_rbd_remove(struct bus_type *bus,
* IO to complete/fail.
*/
blk_mq_freeze_queue(rbd_dev->disk->queue);
blk_set_queue_dying(rbd_dev->disk->queue);
blk_mark_disk_dead(rbd_dev->disk);
}

del_gendisk(rbd_dev->disk);
2 changes: 1 addition & 1 deletion drivers/block/xen-blkfront.c
Original file line number Diff line number Diff line change
@@ -2078,7 +2078,7 @@ static void blkfront_closing(struct blkfront_info *info)

/* No more blkif_request(). */
blk_mq_stop_hw_queues(info->rq);
blk_set_queue_dying(info->rq);
blk_mark_disk_dead(info->gd);
set_capacity(info->gd, 0);

for_each_rinfo(info, rinfo, i) {
1 change: 1 addition & 0 deletions drivers/cpufreq/intel_pstate.c
Original file line number Diff line number Diff line change
@@ -2353,6 +2353,7 @@ static const struct x86_cpu_id intel_pstate_cpu_oob_ids[] __initconst = {
X86_MATCH(BROADWELL_D, core_funcs),
X86_MATCH(BROADWELL_X, core_funcs),
X86_MATCH(SKYLAKE_X, core_funcs),
X86_MATCH(ICELAKE_X, core_funcs),
{}
};

2 changes: 1 addition & 1 deletion drivers/infiniband/hw/mlx5/mr.c
Original file line number Diff line number Diff line change
@@ -1024,7 +1024,7 @@ static void *mlx5_ib_alloc_xlt(size_t *nents, size_t ent_size, gfp_t gfp_mask)

if (size > MLX5_SPARE_UMR_CHUNK) {
size = MLX5_SPARE_UMR_CHUNK;
*nents = get_order(size) / ent_size;
*nents = size / ent_size;
res = (void *)__get_free_pages(gfp_mask | __GFP_NOWARN,
get_order(size));
if (res)
2 changes: 1 addition & 1 deletion drivers/md/dm.c
Original file line number Diff line number Diff line change
@@ -2171,7 +2171,7 @@ static void __dm_destroy(struct mapped_device *md, bool wait)
set_bit(DMF_FREEING, &md->flags);
spin_unlock(&_minor_lock);

blk_set_queue_dying(md->queue);
blk_mark_disk_dead(md->disk);

/*
* Take suspend_lock so that presuspend and postsuspend methods
24 changes: 24 additions & 0 deletions drivers/net/ethernet/intel/Kconfig
Original file line number Diff line number Diff line change
@@ -313,6 +313,30 @@ config ICE
To compile this driver as a module, choose M here. The module
will be called ice.

config ICE_SWITCHDEV
bool "Switchdev Support"
default y
depends on ICE && NET_SWITCHDEV
help
Switchdev support provides internal SRIOV packet steering and switching.

To enable it on running kernel use devlink tool:
#devlink dev eswitch set pci/0000:XX:XX.X mode switchdev

Say Y here if you want to use Switchdev in the driver.

If unsure, say N.

config ICE_HWTS
bool "Support HW cross-timestamp on platforms with PTM support"
default y
depends on ICE && X86
help
Say Y to enable hardware supported cross-timestamping on platforms
with PCIe PTM support. The cross-timestamp is available through
the PTP clock driver precise cross-timestamp ioctl
(PTP_SYS_OFFSET_PRECISE).

config FM10K
tristate "Intel(R) FM10000 Ethernet Switch Host Interface Support"
default n
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