Changes representative of linux-3.10.0-862.2.3.el7.tar.xz

Makefile

@@ -5,7 +5,7 @@ EXTRAVERSION =
 NAME = Unicycling Gorilla
 RHEL_MAJOR = 7
 RHEL_MINOR = 5
-RHEL_RELEASE = 862
+RHEL_RELEASE = 862.2.3
 
 #
 # DRM backport version

arch/powerpc/include/asm/hvcall.h

@@ -313,17 +313,15 @@
 #define H_SET_MODE_RESOURCE_LE			4
 
 /* H_GET_CPU_CHARACTERISTICS return values */
-#define H_GET_CPU_CHAR_CHAR_ORI31_SPEC_BAR	PPC_BIT(0)
-#define H_GET_CPU_CHAR_CHAR_BCCTR_SERIAL	PPC_BIT(1)
-#define H_GET_CPU_CHAR_CHAR_ORI30_L1_FLUSH	PPC_BIT(2)
-#define H_GET_CPU_CHAR_CHAR_MTTRIG2_L1_FLUSH	PPC_BIT(3)
-#define H_GET_CPU_CHAR_CHAR_L1D_PRIVATE		PPC_BIT(4)
-#define H_GET_CPU_CHAR_CHAR_BC_HINTS_HONORED	PPC_BIT(5)
-#define H_GET_CPU_CHAR_CHAR_MTTRID01_THR_CFG	PPC_BIT(6)
-
-#define H_GET_CPU_CHAR_BEHAV_FAV_SEC_VS_PERF	PPC_BIT(0)
-#define H_GET_CPU_CHAR_BEHAV_L1_FLUSH_LOW_PRIV	PPC_BIT(1)
-#define H_GET_CPU_CHAR_BEHAV_SPEC_BAR_BNDS_CHK	PPC_BIT(2)
+#define H_CPU_CHAR_SPEC_BAR_ORI31	(1ull << 63) // IBM bit 0
+#define H_CPU_CHAR_BCCTRL_SERIALISED	(1ull << 62) // IBM bit 1
+#define H_CPU_CHAR_L1D_FLUSH_ORI30	(1ull << 61) // IBM bit 2
+#define H_CPU_CHAR_L1D_FLUSH_TRIG2	(1ull << 60) // IBM bit 3
+#define H_CPU_CHAR_L1D_THREAD_PRIV	(1ull << 59) // IBM bit 4
+
+#define H_CPU_BEHAV_FAVOUR_SECURITY	(1ull << 63) // IBM bit 0
+#define H_CPU_BEHAV_L1D_FLUSH_PR	(1ull << 62) // IBM bit 1
+#define H_CPU_BEHAV_BNDS_CHK_SPEC_BAR	(1ull << 61) // IBM bit 2
 
 #ifndef __ASSEMBLY__
 
@@ -456,6 +454,13 @@ extern long pSeries_disable_reloc_on_exc(void);
 
 extern long pseries_big_endian_exceptions(void);
 
+#include <asm/types.h>
+
+struct h_cpu_char_result {
+	u64 character;
+	u64 behaviour;
+};
+
 #else
 
 #define pSeries_enable_reloc_on_exc()  do {} while (0)

arch/powerpc/include/asm/plpar_wrappers.h

@@ -335,18 +335,16 @@ static inline long plapr_set_watchpoint0(unsigned long dawr0, unsigned long dawr
 	return plpar_set_mode(0, 2, dawr0, dawrx0);
 }
 
-static inline long plpar_get_cpu_characteristics(unsigned long *character,
-						 unsigned long *behavior)
+static inline long plpar_get_cpu_characteristics(struct h_cpu_char_result *p)
 {
-	long rc;
 	unsigned long retbuf[PLPAR_HCALL_BUFSIZE];
+	long rc;
 
 	rc = plpar_hcall(H_GET_CPU_CHARACTERISTICS, retbuf);
-
-	if (character)
-		*character = retbuf[0];
-	if (behavior)
-		*behavior = retbuf[1];
+	if (rc == H_SUCCESS) {
+		p->character = retbuf[0];
+		p->behaviour = retbuf[1];
+	}
 
 	return rc;
 }

arch/powerpc/kernel/ptrace.c

@@ -129,7 +129,7 @@ static void flush_tmregs_to_thread(struct task_struct *tsk)
 	 * in the appropriate thread structures from live.
 	 */
 
-	if (tsk != current)
+	if ((!cpu_has_feature(CPU_FTR_TM)) || (tsk != current))
 		return;
 
 	if (MSR_TM_SUSPENDED(mfmsr())) {

arch/powerpc/kvm/powerpc.c

@@ -1335,16 +1335,16 @@ static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
 #ifdef CONFIG_PPC_PSERIES
 static int pseries_get_cpu_char(struct kvm_ppc_cpu_char *cp)
 {
-	unsigned long character, behaviour;
+	struct h_cpu_char_result c;
 	unsigned long rc;
 
 	if (!machine_is(pseries))
 		return -ENOTTY;
 
-	rc = plpar_get_cpu_characteristics(&character, &behaviour);
+	rc = plpar_get_cpu_characteristics(&c);
 	if (rc == H_SUCCESS) {
-		cp->character = character;
-		cp->behaviour = behaviour;
+		cp->character = c.character;
+		cp->behaviour = c.behaviour;
 		cp->character_mask = KVM_PPC_CPU_CHAR_SPEC_BAR_ORI31 |
 			KVM_PPC_CPU_CHAR_BCCTRL_SERIALISED |
 			KVM_PPC_CPU_CHAR_L1D_FLUSH_ORI30 |

arch/powerpc/platforms/powernv/setup.c

@@ -83,6 +83,10 @@ static void pnv_setup_rfi_flush(void)
 		if (np && of_property_read_bool(np, "disabled"))
 			enable--;
 
+		np = of_get_child_by_name(fw_features, "speculation-policy-favor-security");
+		if (np && of_property_read_bool(np, "disabled"))
+			enable = 0;
+
 		of_node_put(np);
 		of_node_put(fw_features);
 	}

arch/powerpc/platforms/pseries/setup.c

@@ -524,27 +524,29 @@ static void __init find_and_init_phbs(void)
 
 static void pSeries_setup_rfi_flush(void)
 {
-	unsigned long character, behaviour, rc;
+	struct h_cpu_char_result result;
 	enum l1d_flush_type types;
 	bool enable;
+	long rc;
 
 	/* Enable by default */
 	enable = true;
 
-	rc = plpar_get_cpu_characteristics(&character, &behaviour);
+	rc = plpar_get_cpu_characteristics(&result);
 	if (rc == H_SUCCESS) {
 		types = L1D_FLUSH_NONE;
 
-		if (character & H_GET_CPU_CHAR_CHAR_MTTRIG2_L1_FLUSH)
+		if (result.character & H_CPU_CHAR_L1D_FLUSH_TRIG2)
 			types |= L1D_FLUSH_MTTRIG;
-		if (character & H_GET_CPU_CHAR_CHAR_ORI30_L1_FLUSH)
+		if (result.character & H_CPU_CHAR_L1D_FLUSH_ORI30)
 			types |= L1D_FLUSH_ORI;
 
 		/* Use fallback if nothing set in hcall */
 		if (types == L1D_FLUSH_NONE)
 			types = L1D_FLUSH_FALLBACK;
 
-		if (!(behaviour & H_GET_CPU_CHAR_BEHAV_L1_FLUSH_LOW_PRIV))
+		if ((!(result.behaviour & H_CPU_BEHAV_L1D_FLUSH_PR)) ||
+		    (!(result.behaviour & H_CPU_BEHAV_FAVOUR_SECURITY)))
 			enable = false;
 	} else {
 		/* Default to fallback if case hcall is not available */

arch/x86/crypto/aesni-intel_glue.c

@@ -192,7 +192,8 @@ static void aesni_gcm_enc_avx(void *ctx, u8 *out,
 			u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
 			u8 *auth_tag, unsigned long auth_tag_len)
 {
-	if (plaintext_len < AVX_GEN2_OPTSIZE) {
+	struct crypto_aes_ctx *aes_ctx = (struct crypto_aes_ctx*)ctx;
+	if ((plaintext_len < AVX_GEN2_OPTSIZE) || (aes_ctx->key_length != AES_KEYSIZE_128)){
 		aesni_gcm_enc(ctx, out, in, plaintext_len, iv, hash_subkey, aad,
 				aad_len, auth_tag, auth_tag_len);
 	} else {
@@ -207,7 +208,8 @@ static void aesni_gcm_dec_avx(void *ctx, u8 *out,
 			u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
 			u8 *auth_tag, unsigned long auth_tag_len)
 {
-	if (ciphertext_len < AVX_GEN2_OPTSIZE) {
+	struct crypto_aes_ctx *aes_ctx = (struct crypto_aes_ctx*)ctx;
+	if ((ciphertext_len < AVX_GEN2_OPTSIZE) || (aes_ctx->key_length != AES_KEYSIZE_128)) {
 		aesni_gcm_dec(ctx, out, in, ciphertext_len, iv, hash_subkey, aad,
 				aad_len, auth_tag, auth_tag_len);
 	} else {
@@ -241,7 +243,8 @@ static void aesni_gcm_enc_avx2(void *ctx, u8 *out,
 			u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
 			u8 *auth_tag, unsigned long auth_tag_len)
 {
-	if (plaintext_len < AVX_GEN2_OPTSIZE) {
+	struct crypto_aes_ctx *aes_ctx = (struct crypto_aes_ctx*)ctx;
+	if ((plaintext_len < AVX_GEN2_OPTSIZE) || (aes_ctx->key_length != AES_KEYSIZE_128)) {
 		aesni_gcm_enc(ctx, out, in, plaintext_len, iv, hash_subkey, aad,
 				aad_len, auth_tag, auth_tag_len);
 	} else if (plaintext_len < AVX_GEN4_OPTSIZE) {
@@ -260,7 +263,8 @@ static void aesni_gcm_dec_avx2(void *ctx, u8 *out,
 			u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
 			u8 *auth_tag, unsigned long auth_tag_len)
 {
-	if (ciphertext_len < AVX_GEN2_OPTSIZE) {
+	struct crypto_aes_ctx *aes_ctx = (struct crypto_aes_ctx*)ctx;
+	if ((ciphertext_len < AVX_GEN2_OPTSIZE) || (aes_ctx->key_length != AES_KEYSIZE_128)) {
 		aesni_gcm_dec(ctx, out, in, ciphertext_len, iv, hash_subkey,
 				aad, aad_len, auth_tag, auth_tag_len);
 	} else if (ciphertext_len < AVX_GEN4_OPTSIZE) {

arch/x86/include/asm/hw_irq.h

@@ -106,7 +106,6 @@ extern unsigned long io_apic_irqs;
 
 extern void init_VISWS_APIC_irqs(void);
 extern void setup_IO_APIC(void);
-extern void disable_IO_APIC(void);
 
 struct io_apic_irq_attr {
 	int ioapic;
@@ -220,10 +219,13 @@ extern void setup_vector_irq(int cpu);
 extern void lock_vector_lock(void);
 extern void unlock_vector_lock(void);
 extern void __setup_vector_irq(int cpu);
+extern void restore_boot_irq_mode(void);
+extern void clear_IO_APIC(void);
 #else
 static inline void lock_vector_lock(void) {}
 static inline void unlock_vector_lock(void) {}
 static inline void __setup_vector_irq(int cpu) {}
+static inline void restore_boot_irq_mode(void) { }
 #endif
 
 #endif /* !ASSEMBLY_ */

arch/x86/include/asm/pgalloc.h

@@ -27,6 +27,17 @@ static inline void paravirt_release_pud(unsigned long pfn) {}
  */
 extern gfp_t __userpte_alloc_gfp;
 
+#ifdef CONFIG_KAISER
+/*
+ * Instead of one pgd, we aquire two pgds.  Being order-1, it is
+ * both 8k in size and 8k-aligned.  That lets us just flip bit 12
+ * in a pointer to swap between the two 4k halves.
+ */
+#define PGD_ALLOCATION_ORDER 1
+#else
+#define PGD_ALLOCATION_ORDER 0
+#endif
+
 /*
  * Allocate and free page tables.
  */

arch/x86/include/asm/pgtable_64.h

@@ -223,15 +223,6 @@ static inline void kaiser_unpoison_pgd_atomic(pgd_t *pgd)
 static inline pgd_t kaiser_set_shadow_pgd(pgd_t *pgdp, pgd_t pgd)
 {
 #ifdef CONFIG_KAISER
-	extern bool in_efi_virtual_mode;
-
-	/*
-	 * EFI virtual mode doesn't use 8k PGD, so there is no user
-	 * page tables to set up.
-	 */
-	if (unlikely(in_efi_virtual_mode))
-		goto ret;
-
 	if (pgd_userspace_access(pgd)) {
 		if (pgdp_maps_userspace(pgdp)) {
 			VM_WARN_ON_ONCE(!is_kaiser_pgd(pgdp));
@@ -278,7 +269,6 @@ static inline pgd_t kaiser_set_shadow_pgd(pgd_t *pgdp, pgd_t pgd)
 		VM_WARN_ON_ONCE(system_state == SYSTEM_RUNNING &&
 				is_kaiser_pgd(pgdp));
 	}
-ret:
 #endif
 	/* return the copy of the PGD we want the kernel to use: */
 	return pgd;

arch/x86/include/asm/vmx.h

@@ -310,6 +310,7 @@ enum vmcs_field {
 #define INTR_TYPE_NMI_INTR		(2 << 8) /* NMI */
 #define INTR_TYPE_HARD_EXCEPTION	(3 << 8) /* processor exception */
 #define INTR_TYPE_SOFT_INTR             (4 << 8) /* software interrupt */
+#define INTR_TYPE_PRIV_SW_EXCEPTION	(5 << 8) /* ICE breakpoint - undocumented */
 #define INTR_TYPE_SOFT_EXCEPTION	(6 << 8) /* software exception */
 
 /* GUEST_INTERRUPTIBILITY_INFO flags. */

arch/x86/kernel/apic/io_apic.c

@@ -686,7 +686,7 @@ static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin)
 		       mpc_ioapic_id(apic), pin);
 }
 
-static void clear_IO_APIC (void)
+void clear_IO_APIC (void)
 {
 	int apic, pin;
 
@@ -2034,16 +2034,8 @@ void native_disable_io_apic(void)
 
 }
 
-/*
- * Not an __init, needed by the reboot code
- */
-void disable_IO_APIC(void)
+void restore_boot_irq_mode(void)
 {
-	/*
-	 * Clear the IO-APIC before rebooting:
-	 */
-	clear_IO_APIC();
-
 	if (!nr_legacy_irqs())
 		return;
 

arch/x86/kernel/crash.c

@@ -202,9 +202,10 @@ void native_machine_crash_shutdown(struct pt_regs *regs)
 #ifdef CONFIG_X86_IO_APIC
 	/* Prevent crash_kexec() from deadlocking on ioapic_lock. */
 	ioapic_zap_locks();
-	disable_IO_APIC();
+	clear_IO_APIC();
 #endif
 	lapic_shutdown();
+	restore_boot_irq_mode();
 #ifdef CONFIG_HPET_TIMER
 	hpet_disable();
 #endif

arch/x86/kernel/entry_64.S

@@ -1400,7 +1400,7 @@ apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
 	.pushsection .kprobes.text, "ax"
 
 paranoidzeroentry_ist debug do_debug DEBUG_STACK
-paranoidzeroentry_ist int3 do_int3 DEBUG_STACK
+zeroentry int3 do_int3
 errorentry stack_segment do_stack_segment
 #ifdef CONFIG_XEN
 zeroentry xen_debug do_debug

arch/x86/kernel/machine_kexec_32.c

@@ -206,11 +206,11 @@ void machine_kexec(struct kimage *image)
 		/*
 		 * We need to put APICs in legacy mode so that we can
 		 * get timer interrupts in second kernel. kexec/kdump
-		 * paths already have calls to disable_IO_APIC() in
-		 * one form or other. kexec jump path also need
-		 * one.
+		 * paths already have calls to restore_boot_irq_mode()
+		 * in one form or other. kexec jump path also need one.
 		 */
-		disable_IO_APIC();
+		clear_IO_APIC();
+		restore_boot_irq_mode();
 #endif
 	}
 

arch/x86/kernel/machine_kexec_64.c

@@ -234,6 +234,14 @@ int machine_kexec_prepare(struct kimage *image)
 	if (result)
 		return result;
 
+#ifdef CONFIG_KAISER
+	/*
+	 * The second page of control_code_page may be corrupted by the
+	 * PTI code, so just clear the page for safety.
+	 */
+	clear_page(image->control_code_page + PAGE_SIZE);
+#endif
+
 	/* update purgatory as needed */
 	result = arch_update_purgatory(image);
 	if (result)
@@ -273,11 +281,11 @@ void machine_kexec(struct kimage *image)
 		/*
 		 * We need to put APICs in legacy mode so that we can
 		 * get timer interrupts in second kernel. kexec/kdump
-		 * paths already have calls to disable_IO_APIC() in
-		 * one form or other. kexec jump path also need
-		 * one.
+		 * paths already have calls to restore_boot_irq_mode()
+		 * in one form or other. kexec jump path also need one.
 		 */
-		disable_IO_APIC();
+		clear_IO_APIC();
+		restore_boot_irq_mode();
 #endif
 	}
 

arch/x86/kernel/reboot.c

@@ -659,7 +659,7 @@ void native_machine_shutdown(void)
 	 * Even without the erratum, it still makes sense to quiet IO APIC
 	 * before disabling Local APIC.
 	 */
-	disable_IO_APIC();
+	clear_IO_APIC();
 #endif
 
 #ifdef CONFIG_SMP
@@ -685,6 +685,7 @@ void native_machine_shutdown(void)
 #endif
 
 	lapic_shutdown();
+	restore_boot_irq_mode();
 
 #ifdef CONFIG_HPET_TIMER
 	hpet_disable();

arch/x86/kernel/smpboot.c

@@ -1472,7 +1472,6 @@ static void remove_siblinginfo(int cpu)
 	cpumask_clear(cpu_llc_shared_mask(cpu));
 	cpumask_clear(cpu_sibling_mask(cpu));
 	cpumask_clear(cpu_core_mask(cpu));
-	c->phys_proc_id = 0;
 	c->cpu_core_id = 0;
 	cpumask_clear_cpu(cpu, cpu_sibling_setup_mask);
 	recompute_smt_state();