A523 FEL fixes #210
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A523 FEL fixes #210
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The Allwinner A523 BROM sets the SCTLR.I bit, to enable the I-cache when running the FEL BROM code. To avoid the required cache maintenance when uploading and executing code, just flag the SoC with our .icache_fix bit, so turn the .I bit off as early as possible. This fixes more advanced sunxi-fel routines like readl/writel and the "spl" command on the A523. Signed-off-by: Andre Przywara <osp@andrep.de>
The SRAM situation on the A523 family of SoCs is a bit more involved: while there is indeed a large 128KB SRAM region at offset 0x20000, this is labeled as "MCU0 SRAM" and is apparently switchable, to the RISC-V MCU. It is unclear at this point whether the MCU will take posession of this region at some point, and whether it might not be available when rebooting or doing some suspend/resume operations. The BootROM doesn't use this SRAM, and actually loads the initial boot0/SPL payload from MMC to 0x44000, so at an 16K offset into SRAM A2. To keep the SPL compatible between MMC/SPI and FEL loads (we cannot be position independent), move the SPL address to this 0x44000. This means we do need a swap buffer, since the FEL stack is right on early in this region. The region after 0x5c000 seem to be used by the BROM, so we cannot use that for buffers, without further limiting the FEL payload. To leave the MCU0 SRAM alone, put those buffers in the 16K *before* the new SPL load address. Since U-Boot will use 0x44000 for the initial SPL stack, put the thunk buffer at the beginning, where it should not be overwritten. The scratch address goes at the usual 4K offset of the SPL address, where it is located just before the FEL stack. Signed-off-by: Andre Przywara <osp@andrep.de>
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While playing with a proper A523 (T527, really) devboard, I noticed some issues with the FEL support: We need to disable the I-cache, to allow uploading and executing code via FEL.
Also the load and buffer addresses are not ideal: the BROM actually loads any MMC payload somewhere else, so we need to follow suit here to keep a single SPL image, for loading via both SD card/eMMC/SPI and via FEL.