[LowerToHW] Fix shr(0-bit, n) lowering (#6683)

Fix an error if a 0-bit was shifted right by any amount and this made it
all the way to LowerToHW (and wasn't canonicalized away earlier).  FIRRTL
semantics interpret this case as a 1-bit zero.  Insert the 1-bit zero if
we ever see this.

Fixes #6652.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>

lib/Conversion/FIRRTLToHW/LowerToHW.cpp

@@ -3748,6 +3748,10 @@ LogicalResult FIRRTLLowering::visitExpr(ShlPrimOp op) {
 }
 
 LogicalResult FIRRTLLowering::visitExpr(ShrPrimOp op) {
+  // If this is a 0-bit value shifted by any amount, then return a 1-bit zero.
+  if (isZeroBitFIRRTLType(op.getInput().getType()))
+    return setLowering(op, getOrCreateIntConstant(1, 0));
+
   auto input = getLoweredValue(op.getInput());
   if (!input)
     return failure();

test/Conversion/FIRRTLToHW/zero-width.mlir

@@ -79,4 +79,14 @@ firrtl.circuit "Arithmetic" {
     // CHECK-NEXT: hw.output
   }
 
+  // Check that a zero-width value shifted right produces a zero.
+  // See: https://github.com/llvm/circt/issues/6652
+  // CHECK-LABEL: hw.module @ShrZW
+  firrtl.module @ShrZW(in %x: !firrtl.uint<0>, out %out: !firrtl.uint<1>) attributes {convention = #firrtl<convention scalarized>} {
+    %0 = firrtl.shr %x, 5 : (!firrtl.uint<0>) -> !firrtl.uint<1>
+    firrtl.connect %out, %0 : !firrtl.uint<1>, !firrtl.uint<1>
+    // CHECK:      %[[false:.+]] = hw.constant false
+    // CHECK-NEXT: hw.output %false
+  }
+
 }