Skip to content

Commit

Permalink
[ARM] vaba.ll - regenerate test checks
Browse files Browse the repository at this point in the history 
Cleanup for #94504
  • Loading branch information
@RKSimon
RKSimon committed Jun 6, 2024
1 parent 9182551 commit fb8421a
Showing 1 changed file with 157 additions and 36 deletions.
193 changes: 157 additions & 36 deletions llvm/test/CodeGen/ARM/vaba.ll
View file
Original file line number Diff line number Diff line change
@@ -1,8 +1,15 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s

define <8 x i8> @vabas8(ptr %A, ptr %B, ptr %C) nounwind {
;CHECK-LABEL: vabas8:
;CHECK: vaba.s8
; CHECK-LABEL: vabas8:
; CHECK: @ %bb.0:
; CHECK-NEXT: vldr d16, [r2]
; CHECK-NEXT: vldr d17, [r1]
; CHECK-NEXT: vldr d18, [r0]
; CHECK-NEXT: vaba.s8 d18, d17, d16
; CHECK-NEXT: vmov r0, r1, d18
; CHECK-NEXT: mov pc, lr
%tmp1 = load <8 x i8>, ptr %A
%tmp2 = load <8 x i8>, ptr %B
%tmp3 = load <8 x i8>, ptr %C
Expand All @@ -12,8 +19,14 @@ define <8 x i8> @vabas8(ptr %A, ptr %B, ptr %C) nounwind {
}

define <4 x i16> @vabas16(ptr %A, ptr %B, ptr %C) nounwind {
;CHECK-LABEL: vabas16:
;CHECK: vaba.s16
; CHECK-LABEL: vabas16:
; CHECK: @ %bb.0:
; CHECK-NEXT: vldr d16, [r2]
; CHECK-NEXT: vldr d17, [r1]
; CHECK-NEXT: vldr d18, [r0]
; CHECK-NEXT: vaba.s16 d18, d17, d16
; CHECK-NEXT: vmov r0, r1, d18
; CHECK-NEXT: mov pc, lr
%tmp1 = load <4 x i16>, ptr %A
%tmp2 = load <4 x i16>, ptr %B
%tmp3 = load <4 x i16>, ptr %C
Expand All @@ -23,8 +36,14 @@ define <4 x i16> @vabas16(ptr %A, ptr %B, ptr %C) nounwind {
}

define <2 x i32> @vabas32(ptr %A, ptr %B, ptr %C) nounwind {
;CHECK-LABEL: vabas32:
;CHECK: vaba.s32
; CHECK-LABEL: vabas32:
; CHECK: @ %bb.0:
; CHECK-NEXT: vldr d16, [r2]
; CHECK-NEXT: vldr d17, [r1]
; CHECK-NEXT: vldr d18, [r0]
; CHECK-NEXT: vaba.s32 d18, d17, d16
; CHECK-NEXT: vmov r0, r1, d18
; CHECK-NEXT: mov pc, lr
%tmp1 = load <2 x i32>, ptr %A
%tmp2 = load <2 x i32>, ptr %B
%tmp3 = load <2 x i32>, ptr %C
Expand All @@ -34,8 +53,14 @@ define <2 x i32> @vabas32(ptr %A, ptr %B, ptr %C) nounwind {
}

define <8 x i8> @vabau8(ptr %A, ptr %B, ptr %C) nounwind {
;CHECK-LABEL: vabau8:
;CHECK: vaba.u8
; CHECK-LABEL: vabau8:
; CHECK: @ %bb.0:
; CHECK-NEXT: vldr d16, [r2]
; CHECK-NEXT: vldr d17, [r1]
; CHECK-NEXT: vldr d18, [r0]
; CHECK-NEXT: vaba.u8 d18, d17, d16
; CHECK-NEXT: vmov r0, r1, d18
; CHECK-NEXT: mov pc, lr
%tmp1 = load <8 x i8>, ptr %A
%tmp2 = load <8 x i8>, ptr %B
%tmp3 = load <8 x i8>, ptr %C
Expand All @@ -45,8 +70,14 @@ define <8 x i8> @vabau8(ptr %A, ptr %B, ptr %C) nounwind {
}

define <4 x i16> @vabau16(ptr %A, ptr %B, ptr %C) nounwind {
;CHECK-LABEL: vabau16:
;CHECK: vaba.u16
; CHECK-LABEL: vabau16:
; CHECK: @ %bb.0:
; CHECK-NEXT: vldr d16, [r2]
; CHECK-NEXT: vldr d17, [r1]
; CHECK-NEXT: vldr d18, [r0]
; CHECK-NEXT: vaba.u16 d18, d17, d16
; CHECK-NEXT: vmov r0, r1, d18
; CHECK-NEXT: mov pc, lr
%tmp1 = load <4 x i16>, ptr %A
%tmp2 = load <4 x i16>, ptr %B
%tmp3 = load <4 x i16>, ptr %C
Expand All @@ -56,8 +87,14 @@ define <4 x i16> @vabau16(ptr %A, ptr %B, ptr %C) nounwind {
}

define <2 x i32> @vabau32(ptr %A, ptr %B, ptr %C) nounwind {
;CHECK-LABEL: vabau32:
;CHECK: vaba.u32
; CHECK-LABEL: vabau32:
; CHECK: @ %bb.0:
; CHECK-NEXT: vldr d16, [r2]
; CHECK-NEXT: vldr d17, [r1]
; CHECK-NEXT: vldr d18, [r0]
; CHECK-NEXT: vaba.u32 d18, d17, d16
; CHECK-NEXT: vmov r0, r1, d18
; CHECK-NEXT: mov pc, lr
%tmp1 = load <2 x i32>, ptr %A
%tmp2 = load <2 x i32>, ptr %B
%tmp3 = load <2 x i32>, ptr %C
Expand All @@ -67,8 +104,15 @@ define <2 x i32> @vabau32(ptr %A, ptr %B, ptr %C) nounwind {
}

define <16 x i8> @vabaQs8(ptr %A, ptr %B, ptr %C) nounwind {
;CHECK-LABEL: vabaQs8:
;CHECK: vaba.s8
; CHECK-LABEL: vabaQs8:
; CHECK: @ %bb.0:
; CHECK-NEXT: vld1.64 {d16, d17}, [r2]
; CHECK-NEXT: vld1.64 {d18, d19}, [r1]
; CHECK-NEXT: vld1.64 {d20, d21}, [r0]
; CHECK-NEXT: vaba.s8 q10, q9, q8
; CHECK-NEXT: vmov r0, r1, d20
; CHECK-NEXT: vmov r2, r3, d21
; CHECK-NEXT: mov pc, lr
%tmp1 = load <16 x i8>, ptr %A
%tmp2 = load <16 x i8>, ptr %B
%tmp3 = load <16 x i8>, ptr %C
Expand All @@ -78,8 +122,15 @@ define <16 x i8> @vabaQs8(ptr %A, ptr %B, ptr %C) nounwind {
}

define <8 x i16> @vabaQs16(ptr %A, ptr %B, ptr %C) nounwind {
;CHECK-LABEL: vabaQs16:
;CHECK: vaba.s16
; CHECK-LABEL: vabaQs16:
; CHECK: @ %bb.0:
; CHECK-NEXT: vld1.64 {d16, d17}, [r2]
; CHECK-NEXT: vld1.64 {d18, d19}, [r1]
; CHECK-NEXT: vld1.64 {d20, d21}, [r0]
; CHECK-NEXT: vaba.s16 q10, q9, q8
; CHECK-NEXT: vmov r0, r1, d20
; CHECK-NEXT: vmov r2, r3, d21
; CHECK-NEXT: mov pc, lr
%tmp1 = load <8 x i16>, ptr %A
%tmp2 = load <8 x i16>, ptr %B
%tmp3 = load <8 x i16>, ptr %C
Expand All @@ -89,8 +140,15 @@ define <8 x i16> @vabaQs16(ptr %A, ptr %B, ptr %C) nounwind {
}

define <4 x i32> @vabaQs32(ptr %A, ptr %B, ptr %C) nounwind {
;CHECK-LABEL: vabaQs32:
;CHECK: vaba.s32
; CHECK-LABEL: vabaQs32:
; CHECK: @ %bb.0:
; CHECK-NEXT: vld1.64 {d16, d17}, [r2]
; CHECK-NEXT: vld1.64 {d18, d19}, [r1]
; CHECK-NEXT: vld1.64 {d20, d21}, [r0]
; CHECK-NEXT: vaba.s32 q10, q9, q8
; CHECK-NEXT: vmov r0, r1, d20
; CHECK-NEXT: vmov r2, r3, d21
; CHECK-NEXT: mov pc, lr
%tmp1 = load <4 x i32>, ptr %A
%tmp2 = load <4 x i32>, ptr %B
%tmp3 = load <4 x i32>, ptr %C
Expand All @@ -100,8 +158,15 @@ define <4 x i32> @vabaQs32(ptr %A, ptr %B, ptr %C) nounwind {
}

define <16 x i8> @vabaQu8(ptr %A, ptr %B, ptr %C) nounwind {
;CHECK-LABEL: vabaQu8:
;CHECK: vaba.u8
; CHECK-LABEL: vabaQu8:
; CHECK: @ %bb.0:
; CHECK-NEXT: vld1.64 {d16, d17}, [r2]
; CHECK-NEXT: vld1.64 {d18, d19}, [r1]
; CHECK-NEXT: vld1.64 {d20, d21}, [r0]
; CHECK-NEXT: vaba.u8 q10, q9, q8
; CHECK-NEXT: vmov r0, r1, d20
; CHECK-NEXT: vmov r2, r3, d21
; CHECK-NEXT: mov pc, lr
%tmp1 = load <16 x i8>, ptr %A
%tmp2 = load <16 x i8>, ptr %B
%tmp3 = load <16 x i8>, ptr %C
Expand All @@ -111,8 +176,15 @@ define <16 x i8> @vabaQu8(ptr %A, ptr %B, ptr %C) nounwind {
}

define <8 x i16> @vabaQu16(ptr %A, ptr %B, ptr %C) nounwind {
;CHECK-LABEL: vabaQu16:
;CHECK: vaba.u16
; CHECK-LABEL: vabaQu16:
; CHECK: @ %bb.0:
; CHECK-NEXT: vld1.64 {d16, d17}, [r2]
; CHECK-NEXT: vld1.64 {d18, d19}, [r1]
; CHECK-NEXT: vld1.64 {d20, d21}, [r0]
; CHECK-NEXT: vaba.u16 q10, q9, q8
; CHECK-NEXT: vmov r0, r1, d20
; CHECK-NEXT: vmov r2, r3, d21
; CHECK-NEXT: mov pc, lr
%tmp1 = load <8 x i16>, ptr %A
%tmp2 = load <8 x i16>, ptr %B
%tmp3 = load <8 x i16>, ptr %C
Expand All @@ -122,8 +194,15 @@ define <8 x i16> @vabaQu16(ptr %A, ptr %B, ptr %C) nounwind {
}

define <4 x i32> @vabaQu32(ptr %A, ptr %B, ptr %C) nounwind {
;CHECK-LABEL: vabaQu32:
;CHECK: vaba.u32
; CHECK-LABEL: vabaQu32:
; CHECK: @ %bb.0:
; CHECK-NEXT: vld1.64 {d16, d17}, [r2]
; CHECK-NEXT: vld1.64 {d18, d19}, [r1]
; CHECK-NEXT: vld1.64 {d20, d21}, [r0]
; CHECK-NEXT: vaba.u32 q10, q9, q8
; CHECK-NEXT: vmov r0, r1, d20
; CHECK-NEXT: vmov r2, r3, d21
; CHECK-NEXT: mov pc, lr
%tmp1 = load <4 x i32>, ptr %A
%tmp2 = load <4 x i32>, ptr %B
%tmp3 = load <4 x i32>, ptr %C
Expand All @@ -149,8 +228,15 @@ declare <8 x i16> @llvm.arm.neon.vabdu.v8i16(<8 x i16>, <8 x i16>) nounwind read
declare <4 x i32> @llvm.arm.neon.vabdu.v4i32(<4 x i32>, <4 x i32>) nounwind readnone

define <8 x i16> @vabals8(ptr %A, ptr %B, ptr %C) nounwind {
;CHECK-LABEL: vabals8:
;CHECK: vabal.s8
; CHECK-LABEL: vabals8:
; CHECK: @ %bb.0:
; CHECK-NEXT: vldr d16, [r2]
; CHECK-NEXT: vldr d17, [r1]
; CHECK-NEXT: vld1.64 {d18, d19}, [r0]
; CHECK-NEXT: vabal.s8 q9, d17, d16
; CHECK-NEXT: vmov r0, r1, d18
; CHECK-NEXT: vmov r2, r3, d19
; CHECK-NEXT: mov pc, lr
%tmp1 = load <8 x i16>, ptr %A
%tmp2 = load <8 x i8>, ptr %B
%tmp3 = load <8 x i8>, ptr %C
Expand All @@ -161,8 +247,15 @@ define <8 x i16> @vabals8(ptr %A, ptr %B, ptr %C) nounwind {
}

define <4 x i32> @vabals16(ptr %A, ptr %B, ptr %C) nounwind {
;CHECK-LABEL: vabals16:
;CHECK: vabal.s16
; CHECK-LABEL: vabals16:
; CHECK: @ %bb.0:
; CHECK-NEXT: vldr d16, [r2]
; CHECK-NEXT: vldr d17, [r1]
; CHECK-NEXT: vld1.64 {d18, d19}, [r0]
; CHECK-NEXT: vabal.s16 q9, d17, d16
; CHECK-NEXT: vmov r0, r1, d18
; CHECK-NEXT: vmov r2, r3, d19
; CHECK-NEXT: mov pc, lr
%tmp1 = load <4 x i32>, ptr %A
%tmp2 = load <4 x i16>, ptr %B
%tmp3 = load <4 x i16>, ptr %C
Expand All @@ -173,8 +266,15 @@ define <4 x i32> @vabals16(ptr %A, ptr %B, ptr %C) nounwind {
}

define <2 x i64> @vabals32(ptr %A, ptr %B, ptr %C) nounwind {
;CHECK-LABEL: vabals32:
;CHECK: vabal.s32
; CHECK-LABEL: vabals32:
; CHECK: @ %bb.0:
; CHECK-NEXT: vldr d16, [r2]
; CHECK-NEXT: vldr d17, [r1]
; CHECK-NEXT: vld1.64 {d18, d19}, [r0]
; CHECK-NEXT: vabal.s32 q9, d17, d16
; CHECK-NEXT: vmov r0, r1, d18
; CHECK-NEXT: vmov r2, r3, d19
; CHECK-NEXT: mov pc, lr
%tmp1 = load <2 x i64>, ptr %A
%tmp2 = load <2 x i32>, ptr %B
%tmp3 = load <2 x i32>, ptr %C
Expand All @@ -185,8 +285,15 @@ define <2 x i64> @vabals32(ptr %A, ptr %B, ptr %C) nounwind {
}

define <8 x i16> @vabalu8(ptr %A, ptr %B, ptr %C) nounwind {
;CHECK-LABEL: vabalu8:
;CHECK: vabal.u8
; CHECK-LABEL: vabalu8:
; CHECK: @ %bb.0:
; CHECK-NEXT: vldr d16, [r2]
; CHECK-NEXT: vldr d17, [r1]
; CHECK-NEXT: vld1.64 {d18, d19}, [r0]
; CHECK-NEXT: vabal.u8 q9, d17, d16
; CHECK-NEXT: vmov r0, r1, d18
; CHECK-NEXT: vmov r2, r3, d19
; CHECK-NEXT: mov pc, lr
%tmp1 = load <8 x i16>, ptr %A
%tmp2 = load <8 x i8>, ptr %B
%tmp3 = load <8 x i8>, ptr %C
Expand All @@ -197,8 +304,15 @@ define <8 x i16> @vabalu8(ptr %A, ptr %B, ptr %C) nounwind {
}

define <4 x i32> @vabalu16(ptr %A, ptr %B, ptr %C) nounwind {
;CHECK-LABEL: vabalu16:
;CHECK: vabal.u16
; CHECK-LABEL: vabalu16:
; CHECK: @ %bb.0:
; CHECK-NEXT: vldr d16, [r2]
; CHECK-NEXT: vldr d17, [r1]
; CHECK-NEXT: vld1.64 {d18, d19}, [r0]
; CHECK-NEXT: vabal.u16 q9, d17, d16
; CHECK-NEXT: vmov r0, r1, d18
; CHECK-NEXT: vmov r2, r3, d19
; CHECK-NEXT: mov pc, lr
%tmp1 = load <4 x i32>, ptr %A
%tmp2 = load <4 x i16>, ptr %B
%tmp3 = load <4 x i16>, ptr %C
Expand All @@ -209,8 +323,15 @@ define <4 x i32> @vabalu16(ptr %A, ptr %B, ptr %C) nounwind {
}

define <2 x i64> @vabalu32(ptr %A, ptr %B, ptr %C) nounwind {
;CHECK-LABEL: vabalu32:
;CHECK: vabal.u32
; CHECK-LABEL: vabalu32:
; CHECK: @ %bb.0:
; CHECK-NEXT: vldr d16, [r2]
; CHECK-NEXT: vldr d17, [r1]
; CHECK-NEXT: vld1.64 {d18, d19}, [r0]
; CHECK-NEXT: vabal.u32 q9, d17, d16
; CHECK-NEXT: vmov r0, r1, d18
; CHECK-NEXT: vmov r2, r3, d19
; CHECK-NEXT: mov pc, lr
%tmp1 = load <2 x i64>, ptr %A
%tmp2 = load <2 x i32>, ptr %B
%tmp3 = load <2 x i32>, ptr %C
Expand Down

0 comments on commit fb8421a

Please sign in to comment.