__riscv_vmulh_vv_i64m1 doesn't work with __attribute__((target("arch=+v")))

[dzaima]

The code:

#include <riscv_vector.h>

__attribute__((target("arch=+v")))
vint64m1_t mulh_i64(vint64m1_t a, vint64m1_t b) {
  return __riscv_vmulh_vv_i64m1(a, b, 2);
}

does not compile with -march=rv64gc, giving the error:

<source>:5:10: error: builtin requires at least one of the following extensions: v
    5 |   return __riscv_vmulh_vv_i64m1(a, b, 2);
      |          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

even though +v is explicitly added. -march=rv64gcv works, and so does an equivalent 32-bit operation. https://godbolt.org/z/qYYzeoxGa

related (but listing different problems)

[topperc]

CC @4vtomat @BeMg

[llvmbot]

@llvm/issue-subscribers-backend-risc-v

Author: dzaima (dzaima)

The code:

#include <riscv_vector.h>

__attribute__((target("arch=+v")))
vint64m1_t mulh_i64(vint64m1_t a, vint64m1_t b) {
  return __riscv_vmulh_vv_i64m1(a, b, 2);
}

does not compile with -march=rv64gc, giving the error:

<source>:5:10: error: builtin requires at least one of the following extensions: v
    5 |   return __riscv_vmulh_vv_i64m1(a, b, 2);
      |          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

even though +v is explicitly added. -march=rv64gcv works, and so does an equivalent 32-bit operation. https://godbolt.org/z/qYYzeoxGa

related (but listing different problems)

[llvmbot]

@llvm/issue-subscribers-clang-frontend

Author: dzaima (dzaima)

The code:

#include <riscv_vector.h>

__attribute__((target("arch=+v")))
vint64m1_t mulh_i64(vint64m1_t a, vint64m1_t b) {
  return __riscv_vmulh_vv_i64m1(a, b, 2);
}

does not compile with -march=rv64gc, giving the error:

<source>:5:10: error: builtin requires at least one of the following extensions: v
    5 |   return __riscv_vmulh_vv_i64m1(a, b, 2);
      |          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

even though +v is explicitly added. -march=rv64gcv works, and so does an equivalent 32-bit operation. https://godbolt.org/z/qYYzeoxGa

related (but listing different problems)