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[AArch64] Incorrect register used for inline assembly input #58384

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Amanieu opened this issue Oct 15, 2022 · 3 comments
Open

[AArch64] Incorrect register used for inline assembly input #58384

Amanieu opened this issue Oct 15, 2022 · 3 comments

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@Amanieu
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Amanieu commented Oct 15, 2022

define void @foo() {
  %1 = call i32 asm sideeffect "", "={x0},0"(i32 435)
  ret void
}

With llc -march=aarch64 -O0, this generates the following assembly.

foo:                                    // @foo
	.cfi_startproc
// %bb.0:
	mov	w8, #435
	mrs	x0, NZCV
	//APP
	//NO_APP
	ret

Using ={x0},{x0} instead of ={x0},0 seems to avoid this issue,

This IR is generated by rustc's inline assembly for an inout("x8") operand, so perhaps this is rustc's fault?
Actually I can reproduce this bug in Clang as well, so it's definitely not an issue that is unique to rustc.

void foo() {
    register int x asm("x8") = 435;
    asm volatile("" : "+&r" (x));
}
@nikic
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nikic commented Oct 15, 2022

Causes an assertion failure:

X0 = COPY W8
unimplemented reg-to-reg copy

@llvmbot
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llvmbot commented Oct 15, 2022

@llvm/issue-subscribers-backend-aarch64

Amanieu added a commit to Amanieu/rust that referenced this issue Nov 2, 2022
Upstream issue: llvm/llvm-project#58384

LLVM gets confused if we assign a 32-bit value to a 64-bit register, so
pass the 32-bit register name to LLVM in that case.
@Amanieu
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Amanieu commented Nov 3, 2022

I worked around this in rustc (rust-lang/rust#103897) by renaming the register to wN instead of xN if the type is 32-bit or smaller. Perhaps this should be solved in the frontend in Clang?

matthiaskrgr added a commit to matthiaskrgr/rust that referenced this issue Nov 4, 2022
asm: Work around LLVM bug on AArch64

Upstream issue: llvm/llvm-project#58384

LLVM gets confused if we assign a 32-bit value to a 64-bit register, so pass the 32-bit register name to LLVM in that case.
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