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[TableGen] Refactor Intrinsics record #106986

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5 changes: 0 additions & 5 deletions llvm/include/llvm/IR/Intrinsics.td
Original file line number Diff line number Diff line change
Expand Up @@ -669,12 +669,7 @@ class Intrinsic<list<LLVMType> ret_types,
// IntrinsicProperty<1>
bit DisableDefaultAttributes = disable_default_attributes;

bit isTarget = false;

TypeInfoGen TypeInfo = TypeInfoGen<RetTypes, ParamTypes>;
bit isOverloaded = TypeInfo.isOverloaded;
list<LLVMType> Types = TypeInfo.Types;
list<list<int>> TypeSig = TypeInfo.TypeSig;
}

// Intrinsic with default attributes (disable_default_attributes = false).
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52 changes: 2 additions & 50 deletions llvm/test/TableGen/intrinsic-attrs.td
Original file line number Diff line number Diff line change
@@ -1,54 +1,6 @@
// RUN: llvm-tblgen -gen-intrinsic-impl -I %p/../../include %s | FileCheck %s
// RUN: llvm-tblgen -gen-intrinsic-impl -I %p/../../include -DTEST_INTRINSICS_SUPPRESS_DEFS %s | FileCheck %s

// Get the minimum blurb necessary to process ...
include "llvm/CodeGen/ValueTypes.td"
include "llvm/CodeGen/SDNodeProperties.td"

class LLVMType<ValueType vt> {
ValueType VT = vt;
int isAny = 0;
}

def llvm_i32_ty : LLVMType<i32>;
def llvm_ptr_ty : LLVMType<iPTR>;

class AttrIndex<int idx> {
int Value = idx;
}

def FuncIndex : AttrIndex<-1>;
def RetIndex : AttrIndex<0>;
class ArgIndex<int argNo> : AttrIndex<!add(argNo, 1)>;

class IntrinsicProperty<bit is_default = 0> {
bit IsDefault = is_default;
}

def IntrNoMem : IntrinsicProperty;
def IntrHasSideEffects : IntrinsicProperty;
class Dereferenceable<AttrIndex idx, int bytes> : IntrinsicProperty {
int ArgNo = idx.Value;
int Bytes = bytes;
}

class Intrinsic<list<LLVMType> ret_types,
list<LLVMType> param_types = [],
list<IntrinsicProperty> intr_properties = [],
string name = "",
list<SDNodeProperty> sd_properties = [],
bit disable_default_attributes = 0> : SDPatternOperator {
string LLVMName = name;
string TargetPrefix = "";
list<LLVMType> RetTypes = ret_types;
list<LLVMType> ParamTypes = param_types;
list<IntrinsicProperty> IntrProperties = intr_properties;
let Properties = sd_properties;
bit DisableDefaultAttributes = 1;


bit isTarget = 0;
bit DisableDefaultAttributes = disable_default_attributes;
}
include "llvm/IR/Intrinsics.td"

// ... this intrinsic.
def int_random_gen : Intrinsic<[llvm_i32_ty], [], [IntrNoMem, IntrHasSideEffects]>;
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36 changes: 4 additions & 32 deletions llvm/test/TableGen/intrinsic-long-name.td
Original file line number Diff line number Diff line change
@@ -1,38 +1,10 @@
// RUN: llvm-tblgen -gen-intrinsic-enums %s | FileCheck %s
// RUN: llvm-tblgen -gen-intrinsic-enums -I %p/../../include %s -DTEST_INTRINSICS_SUPPRESS_DEFS | FileCheck %s
// XFAIL: vg_leak

class IntrinsicProperty<bit is_default = 0> {
bit IsDefault = is_default;
}

class SDNodeProperty;

class ValueType<int size, int value> {
string Namespace = "MVT";
int Size = size;
int Value = value;
}

class LLVMType<ValueType vt> {
ValueType VT = vt;
}

class Intrinsic<string name, list<LLVMType> param_types = []> {
string LLVMName = name;
bit isTarget = 0;
string TargetPrefix = "";
list<LLVMType> RetTypes = [];
list<LLVMType> ParamTypes = param_types;
list<IntrinsicProperty> IntrProperties = [];
list<SDNodeProperty> Properties = [];
bit DisableDefaultAttributes = 1;
}

def iAny : ValueType<0, 253>;
def llvm_anyint_ty : LLVMType<iAny>;
include "llvm/IR/Intrinsics.td"

// Make sure we generate the long name without crashing
// CHECK: this_is_a_really_long_intrinsic_name_but_we_should_still_not_crash, // llvm.this.is.a.really.long.intrinsic.name.but.we.should.still.not.crash
def int_foo : Intrinsic<"llvm.foo", [llvm_anyint_ty]>;
def int_this_is_a_really_long_intrinsic_name_but_we_should_still_not_crash : Intrinsic<"llvm.this.is.a.really.long.intrinsic.name.but.we.should.still.not.crash", [llvm_anyint_ty]>;
def int_foo : Intrinsic<[llvm_anyint_ty], [], [], "llvm.foo">;
def int_this_is_a_really_long_intrinsic_name_but_we_should_still_not_crash : Intrinsic<[llvm_anyint_ty], [], [], "llvm.this.is.a.really.long.intrinsic.name.but.we.should.still.not.crash">;

37 changes: 5 additions & 32 deletions llvm/test/TableGen/intrinsic-struct.td
Original file line number Diff line number Diff line change
@@ -1,38 +1,11 @@
// RUN: llvm-tblgen -gen-intrinsic-enums %s | FileCheck %s
// RUN: llvm-tblgen -gen-intrinsic-enums -I %p/../../include %s -DTEST_INTRINSICS_SUPPRESS_DEFS | FileCheck %s
// XFAIL: vg_leak

class IntrinsicProperty<bit is_default = 0> {
bit IsDefault = is_default;
}

class SDNodeProperty;

class ValueType<int size, int value> {
string Namespace = "MVT";
int Size = size;
int Value = value;
}

class LLVMType<ValueType vt> {
ValueType VT = vt;
}

class Intrinsic<string name, list<LLVMType> ret_types = []> {
string LLVMName = name;
bit isTarget = 0;
string TargetPrefix = "";
list<LLVMType> RetTypes = ret_types;
list<LLVMType> ParamTypes = [];
list<IntrinsicProperty> IntrProperties = [];
list<SDNodeProperty> Properties = [];
bit DisableDefaultAttributes = 1;
}

def iAny : ValueType<0, 253>;
def llvm_anyint_ty : LLVMType<iAny>;
include "llvm/IR/Intrinsics.td"

// Make sure we can return up to 8 values
// CHECK: returns_8_results = {{[0-9]+}}, // llvm.returns.8.results
def int_returns_8_results : Intrinsic<"llvm.returns.8.results",
def int_returns_8_results : Intrinsic<
[llvm_anyint_ty, llvm_anyint_ty, llvm_anyint_ty, llvm_anyint_ty,
llvm_anyint_ty, llvm_anyint_ty, llvm_anyint_ty, llvm_anyint_ty]>;
llvm_anyint_ty, llvm_anyint_ty, llvm_anyint_ty, llvm_anyint_ty],
[], [], "llvm.returns.8.results">;
37 changes: 4 additions & 33 deletions llvm/test/TableGen/searchabletables-intrinsic.td
Original file line number Diff line number Diff line change
@@ -1,48 +1,19 @@
// RUN: llvm-tblgen -gen-searchable-tables -I %p/../../include %s | FileCheck %s
// RUN: llvm-tblgen -gen-searchable-tables -I %p/../../include -DTEST_INTRINSICS_SUPPRESS_DEFS %s | FileCheck %s
// XFAIL: vg_leak

include "llvm/TableGen/SearchableTable.td"

class IntrinsicProperty<bit is_default = 0> {
bit IsDefault = is_default;
}

class SDNodeProperty;

class ValueType<int size, int value> {
string Namespace = "MVT";
int Size = size;
int Value = value;
}

class LLVMType<ValueType vt> {
ValueType VT = vt;
}

class Intrinsic<list<LLVMType> param_types = []> {
string LLVMName = "";
bit isTarget = 0;
string TargetPrefix = "";
list<LLVMType> RetTypes = [];
list<LLVMType> ParamTypes = param_types;
list<IntrinsicProperty> IntrProperties = [];
list<SDNodeProperty> Properties = [];
bit DisableDefaultAttributes = 1;
}

def iAny : ValueType<0, 253>;
def llvm_anyint_ty : LLVMType<iAny>;
include "llvm/IR/Intrinsics.td"

def int_abc : Intrinsic<[llvm_anyint_ty]>;
def int_xyz : Intrinsic<[llvm_anyint_ty]>;

let isTarget = 1, TargetPrefix = "gtarget" in {
let TargetPrefix = "gtarget" in {
def int_gtarget_def : Intrinsic<[llvm_anyint_ty]>;
def int_gtarget_defg : Intrinsic<[llvm_anyint_ty]>;
def int_gtarget_uvw : Intrinsic<[llvm_anyint_ty]>;
}

let isTarget = 1, TargetPrefix = "ftarget" in {
let TargetPrefix = "ftarget" in {
def int_ftarget_ghi : Intrinsic<[llvm_anyint_ty]>;
def int_ftarget_ghi_x : Intrinsic<[llvm_anyint_ty]>;
def int_ftarget_rst : Intrinsic<[llvm_anyint_ty]>;
Expand Down
23 changes: 14 additions & 9 deletions llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -96,17 +96,22 @@ CodeGenIntrinsic::CodeGenIntrinsic(const Record *R,
TargetPrefix + ".'!");
}

if (auto *Types = R->getValue("Types")) {
auto *TypeList = cast<ListInit>(Types->getValue());
isOverloaded = R->getValueAsBit("isOverloaded");
const Record *TypeInfo = R->getValueAsDef("TypeInfo");
if (!TypeInfo->isSubClassOf("TypeInfoGen"))
PrintFatalError(DefLoc, "TypeInfo field in " + DefName +
" should be of subclass of TypeInfoGen!");

unsigned I = 0;
for (unsigned E = R->getValueAsListInit("RetTypes")->size(); I < E; ++I)
IS.RetTys.push_back(TypeList->getElementAsRecord(I));
isOverloaded = TypeInfo->getValueAsBit("isOverloaded");
const ListInit *TypeList = TypeInfo->getValueAsListInit("Types");

for (unsigned E = TypeList->size(); I < E; ++I)
IS.ParamTys.push_back(TypeList->getElementAsRecord(I));
}
// Types field is a concatenation of Return types followed by Param types.
unsigned Idx = 0;
unsigned NumRet = R->getValueAsListInit("RetTypes")->size();
for (; Idx < NumRet; ++Idx)
IS.RetTys.push_back(TypeList->getElementAsRecord(Idx));

for (unsigned E = TypeList->size(); Idx < E; ++Idx)
IS.ParamTys.push_back(TypeList->getElementAsRecord(Idx));

// Parse the intrinsic properties.
ListInit *PropList = R->getValueAsListInit("IntrProperties");
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11 changes: 6 additions & 5 deletions llvm/utils/TableGen/IntrinsicEmitter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -273,11 +273,12 @@ using TypeSigTy = SmallVector<unsigned char>;
/// Computes type signature of the intrinsic \p Int.
static TypeSigTy ComputeTypeSignature(const CodeGenIntrinsic &Int) {
TypeSigTy TypeSig;
if (const auto *R = Int.TheDef->getValue("TypeSig")) {
for (const auto *a : cast<ListInit>(R->getValue())->getValues()) {
for (const auto *b : cast<ListInit>(a)->getValues())
TypeSig.emplace_back(cast<IntInit>(b)->getValue());
}
const Record *TypeInfo = Int.TheDef->getValueAsDef("TypeInfo");
const ListInit *OuterList = TypeInfo->getValueAsListInit("TypeSig");
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for (const auto *Outer : OuterList->getValues()) {
for (const auto *Inner : cast<ListInit>(Outer)->getValues())
TypeSig.emplace_back(cast<IntInit>(Inner)->getValue());
}
return TypeSig;
}
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