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[LoongArch] Adjust LA64 data layout by using n32:64 in layout string #93814

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merged 2 commits into from
Jun 6, 2024

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@heiher heiher commented May 30, 2024

Although i32 type is illegal in the backend, LA64 has pretty good support for i32 types by using W instructions.

By adding n32 to the DataLayout string, middle end optimizations will consider i32 to be a native type. One known effect of this is enabling LoopStrengthReduce on loops with i32 induction variables. This can be beneficial because C/C++ code often has loops with i32 induction variables due to the use of int or unsigned int.

If this patch exposes performance issues, those are better addressed by tuning LSR or other passes.

Although i32 type is illegal in the backend, LA64 has pretty good support for
i32 types by using W instructions.

By adding n32 to the DataLayout string, middle end optimizations will consider
i32 to be a native type. One known effect of this is enabling LoopStrengthReduce
on loops with i32 induction variables. This can be beneficial because C/C++ code
often has loops with i32 induction variables due to the use of `int` or
`unsigned int`.

If this patch exposes performance issues, those are better addressed by tuning
LSR or other passes.
@heiher heiher requested review from wangleiat and SixWeining May 30, 2024 12:19
@heiher heiher self-assigned this May 30, 2024
@llvmbot llvmbot added clang Clang issues not falling into any other category clang:frontend Language frontend issues, e.g. anything involving "Sema" backend:loongarch llvm:ir labels May 30, 2024
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llvmbot commented May 30, 2024

@llvm/pr-subscribers-llvm-ir
@llvm/pr-subscribers-clang

@llvm/pr-subscribers-backend-loongarch

Author: hev (heiher)

Changes

Although i32 type is illegal in the backend, LA64 has pretty good support for i32 types by using W instructions.

By adding n32 to the DataLayout string, middle end optimizations will consider i32 to be a native type. One known effect of this is enabling LoopStrengthReduce on loops with i32 induction variables. This can be beneficial because C/C++ code often has loops with i32 induction variables due to the use of int or unsigned int.

If this patch exposes performance issues, those are better addressed by tuning LSR or other passes.


Full diff: https://github.com/llvm/llvm-project/pull/93814.diff

5 Files Affected:

  • (modified) clang/lib/Basic/Targets/LoongArch.h (+1-1)
  • (modified) llvm/docs/ReleaseNotes.rst (+4)
  • (modified) llvm/lib/IR/AutoUpgrade.cpp (+2-2)
  • (modified) llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp (+1-1)
  • (modified) llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp (+5)
diff --git a/clang/lib/Basic/Targets/LoongArch.h b/clang/lib/Basic/Targets/LoongArch.h
index 68572843f2d74..5fc223483951e 100644
--- a/clang/lib/Basic/Targets/LoongArch.h
+++ b/clang/lib/Basic/Targets/LoongArch.h
@@ -133,7 +133,7 @@ class LLVM_LIBRARY_VISIBILITY LoongArch64TargetInfo
     LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
     IntMaxType = Int64Type = SignedLong;
     HasUnalignedAccess = true;
-    resetDataLayout("e-m:e-p:64:64-i64:64-i128:128-n64-S128");
+    resetDataLayout("e-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
     // TODO: select appropriate ABI.
     setABI("lp64d");
   }
diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index 1e1ccb495c366..7acdf22462b36 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -107,6 +107,10 @@ Changes to the Hexagon Backend
 Changes to the LoongArch Backend
 --------------------------------
 
+* i32 is now a native type in the datalayout string. This enables
+  LoopStrengthReduce for loops with i32 induction variables, among other
+  optimizations.
+
 Changes to the MIPS Backend
 ---------------------------
 
diff --git a/llvm/lib/IR/AutoUpgrade.cpp b/llvm/lib/IR/AutoUpgrade.cpp
index a7ed2de6e8a5f..b66c9bfd22932 100644
--- a/llvm/lib/IR/AutoUpgrade.cpp
+++ b/llvm/lib/IR/AutoUpgrade.cpp
@@ -5368,8 +5368,8 @@ std::string llvm::UpgradeDataLayoutString(StringRef DL, StringRef TT) {
     return DL.empty() ? std::string("G1") : (DL + "-G1").str();
   }
 
-  if (T.isRISCV64()) {
-    // Make i32 a native type for 64-bit RISC-V.
+  if (T.isRISCV64() || T.isLoongArch64()) {
+    // Make i32 a native type for 64-bit RISC-V and LoongArch.
     auto I = DL.find("-n64-");
     if (I != StringRef::npos)
       return (DL.take_front(I) + "-n32:64-" + DL.drop_front(I + 5)).str();
diff --git a/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp b/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
index 2b2d4e478cc82..60e09bb2f058a 100644
--- a/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
@@ -46,7 +46,7 @@ static cl::opt<bool>
 
 static std::string computeDataLayout(const Triple &TT) {
   if (TT.isArch64Bit())
-    return "e-m:e-p:64:64-i64:64-i128:128-n64-S128";
+    return "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128";
   assert(TT.isArch32Bit() && "only LA32 and LA64 are currently supported");
   return "e-m:e-p:32:32-i64:64-n32-S128";
 }
diff --git a/llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp b/llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
index 7148e2902fa7a..ca50187e5e5ee 100644
--- a/llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
+++ b/llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
@@ -63,6 +63,11 @@ TEST(DataLayoutUpgradeTest, ValidDataLayoutUpgrade) {
                                     "riscv64"),
             "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
 
+  // Check that LoongArch64 upgrades -n64 to -n32:64.
+  EXPECT_EQ(UpgradeDataLayoutString("e-m:e-p:64:64-i64:64-i128:128-n64-S128",
+                                    "loongarch64"),
+            "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
+
   // Check that SPIR && SPIRV targets add -G1 if it's not present.
   EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32", "spir"), "e-p:32:32-G1");
   EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32", "spir64"), "e-p:32:32-G1");

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@wangleiat What do you think?

llvm/lib/IR/AutoUpgrade.cpp Outdated Show resolved Hide resolved
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@wangleiat What do you think?

I think this is a good start, and we should make i32 truly legal on LoongArch64, just like RISC-V.

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Thanks.

@heiher heiher merged commit 46edc02 into llvm:main Jun 6, 2024
8 checks passed
@heiher heiher deleted the da-n32 branch June 6, 2024 06:05
zmodem added a commit to zmodem/rust that referenced this pull request Jun 12, 2024
compiler-errors added a commit to compiler-errors/rust that referenced this pull request Jun 12, 2024
Adjust LoongArch64 data layouts for LLVM update

The data layout was changed in LLVM 19: llvm/llvm-project#93814
rust-timer added a commit to rust-lang-ci/rust that referenced this pull request Jun 12, 2024
Rollup merge of rust-lang#126324 - zmodem:loongarch, r=nikic

Adjust LoongArch64 data layouts for LLVM update

The data layout was changed in LLVM 19: llvm/llvm-project#93814
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4 participants