[Test] Add a new test case to validate the fix_pins option

[tangxifan]

Motivate of the pull request

• To address an existing issue. If so, please provide a link to the issue:
• Breaking new feature. If so, please describe details in the description part.

Describe the technical details

What is currently done? (Provide issue link if applicable)

Currently, OpenFPGA has the following limitations:

• --fix_pins {file} is an important feature of VPR which accepts pin constraints when implementing a circuit on an FPGA
• However, such feature is not yet under any regression tests.

What does this pull request change?

This PR improves in the following aspects:

• Created a new tests under the basic regression test to validate the --fix_pins option

Which part of the code base require a change

• VPR
• Tileable routing architecture generator
• OpenFPGA libraries
• FPGA-Verilog
• FPGA-Bitstream
• FPGA-SDC
• FPGA-SPICE
• Flow scripts
• Architecture library
• Cell library
• Documentation
• Regression tests
• Continous Integration (CI) scripts

Impact of the pull request

• Require a change on Quality of Results (QoR)
• Break back-compatibility. If so, please list who may be influenced.