Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[test] now no timestamp test case covers gsb files #759

Merged
merged 2 commits into from
Sep 1, 2022
Merged

Conversation

tangxifan
Copy link
Collaborator

@tangxifan tangxifan commented Sep 1, 2022

Motivate of the pull request

  • To address an existing issue. If so, please provide a link to the issue:
  • Breaking new feature. If so, please describe details in the description part.

Describe the technical details

What is currently done? (Provide issue link if applicable)

What does this pull request change?

This PR improves in the following aspects:

  • Put gsb files under golden output tracking
  • Put io location file under golden output tracking

This will help to ensure backward compatibility in #747

Which part of the code base require a change

  • VPR
  • Tileable routing architecture generator
  • OpenFPGA libraries
  • FPGA-Verilog
  • FPGA-Bitstream
  • FPGA-SDC
  • FPGA-SPICE
  • Flow scripts
  • Architecture library
  • Cell library
  • Documentation
  • Regression tests
  • Continous Integration (CI) scripts

Impact of the pull request

  • Require a change on Quality of Results (QoR)
  • Break back-compatibility. If so, please list who may be influenced.

@tangxifan tangxifan merged commit fec4a4a into master Sep 1, 2022
@tangxifan tangxifan deleted the no_ts_gsb branch September 1, 2022 22:54
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Projects
None yet
Development

Successfully merging this pull request may close these issues.

1 participant