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[RISCV][GISel] Support G_FPEXT/FPTRUNC with ZFh.
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topperc authored and lravenclaw committed Jul 3, 2024
1 parent f986d2a commit 9b77b3c
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11 changes: 10 additions & 1 deletion llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -384,15 +384,24 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST)
getActionDefinitionsBuilder(G_FCOPYSIGN)
.legalIf(all(typeIsScalarFPArith(0, ST), typeIsScalarFPArith(1, ST)));

// FIXME: Use Zfhmin.
getActionDefinitionsBuilder(G_FPTRUNC).legalIf(
[=, &ST](const LegalityQuery &Query) -> bool {
return (ST.hasStdExtD() && typeIs(0, s32)(Query) &&
typeIs(1, s64)(Query)) ||
(ST.hasStdExtZfh() && typeIs(0, s16)(Query) &&
typeIs(1, s32)(Query)) ||
(ST.hasStdExtZfh() && ST.hasStdExtD() && typeIs(0, s16)(Query) &&
typeIs(1, s64)(Query));
});
getActionDefinitionsBuilder(G_FPEXT).legalIf(
[=, &ST](const LegalityQuery &Query) -> bool {
return (ST.hasStdExtD() && typeIs(0, s64)(Query) &&
typeIs(1, s32)(Query));
typeIs(1, s32)(Query)) ||
(ST.hasStdExtZfh() && typeIs(0, s32)(Query) &&
typeIs(1, s16)(Query)) ||
(ST.hasStdExtZfh() && ST.hasStdExtD() && typeIs(0, s64)(Query) &&
typeIs(1, s16)(Query));
});

getActionDefinitionsBuilder(G_FCMP)
Expand Down
Original file line number Diff line number Diff line change
@@ -0,0 +1,94 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -mattr=+d,+zfh -run-pass=instruction-select \
# RUN: -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s
# RUN: llc -mtriple=riscv64 -mattr=+d,+zfh -run-pass=instruction-select \
# RUN: -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s

---
name: fpext_f32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1:
liveins: $f10_h
; CHECK-LABEL: name: fpext_f32
; CHECK: liveins: $f10_h
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $f10_h
; CHECK-NEXT: [[FCVT_S_H:%[0-9]+]]:fpr32 = nofpexcept FCVT_S_H [[COPY]], 0
; CHECK-NEXT: $f10_f = COPY [[FCVT_S_H]]
; CHECK-NEXT: PseudoRET implicit $f10_f
%0:fprb(s16) = COPY $f10_h
%1:fprb(s32) = G_FPEXT %0(s16)
$f10_f = COPY %1(s32)
PseudoRET implicit $f10_f
...
---
name: fptrunc_f32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1:
liveins: $f10_f
; CHECK-LABEL: name: fptrunc_f32
; CHECK: liveins: $f10_f
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
; CHECK-NEXT: [[FCVT_H_S:%[0-9]+]]:fpr16 = nofpexcept FCVT_H_S [[COPY]], 7
; CHECK-NEXT: $f10_h = COPY [[FCVT_H_S]]
; CHECK-NEXT: PseudoRET implicit $f10_h
%0:fprb(s32) = COPY $f10_f
%1:fprb(s16) = G_FPTRUNC %0(s32)
$f10_h = COPY %1(s16)
PseudoRET implicit $f10_h
...
---
name: fpext_f64
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1:
liveins: $f10_h
; CHECK-LABEL: name: fpext_f64
; CHECK: liveins: $f10_h
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $f10_h
; CHECK-NEXT: [[FCVT_D_H:%[0-9]+]]:fpr64 = nofpexcept FCVT_D_H [[COPY]], 0
; CHECK-NEXT: $f10_d = COPY [[FCVT_D_H]]
; CHECK-NEXT: PseudoRET implicit $f10_d
%0:fprb(s16) = COPY $f10_h
%1:fprb(s64) = G_FPEXT %0(s16)
$f10_d = COPY %1(s64)
PseudoRET implicit $f10_d
...
---
name: fptrunc_f64
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1:
liveins: $f10_d
; CHECK-LABEL: name: fptrunc_f64
; CHECK: liveins: $f10_d
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
; CHECK-NEXT: [[FCVT_H_D:%[0-9]+]]:fpr16 = nofpexcept FCVT_H_D [[COPY]], 7
; CHECK-NEXT: $f10_h = COPY [[FCVT_H_D]]
; CHECK-NEXT: PseudoRET implicit $f10_h
%0:fprb(s64) = COPY $f10_d
%1:fprb(s16) = G_FPTRUNC %0(s64)
$f10_h = COPY %1(s16)
PseudoRET implicit $f10_h
...
Original file line number Diff line number Diff line change
@@ -0,0 +1,82 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
# RUN: llc -mtriple=riscv32 -mattr=+d,+zfh -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s
# RUN: llc -mtriple=riscv64 -mattr=+d,+zfh -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s

---
name: fpext_f32
body: |
bb.1:
liveins: $f10_h
; CHECK-LABEL: name: fpext_f32
; CHECK: liveins: $f10_h
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $f10_h
; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[COPY]](s16)
; CHECK-NEXT: $f10_f = COPY [[FPEXT]](s32)
; CHECK-NEXT: PseudoRET implicit $f10_f
%0:_(s16) = COPY $f10_h
%1:_(s32) = G_FPEXT %0(s16)
$f10_f = COPY %1(s32)
PseudoRET implicit $f10_f
...
---
name: fptrunc_f32
body: |
bb.1:
liveins: $f10_f
; CHECK-LABEL: name: fptrunc_f32
; CHECK: liveins: $f10_f
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $f10_f
; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[COPY]](s32)
; CHECK-NEXT: $f10_h = COPY [[FPTRUNC]](s16)
; CHECK-NEXT: PseudoRET implicit $f10_h
%0:_(s32) = COPY $f10_f
%1:_(s16) = G_FPTRUNC %0(s32)
$f10_h = COPY %1(s16)
PseudoRET implicit $f10_h
...
---
name: fpext_f64
body: |
bb.1:
liveins: $f10_h
; CHECK-LABEL: name: fpext_f64
; CHECK: liveins: $f10_h
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $f10_h
; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(s64) = G_FPEXT [[COPY]](s16)
; CHECK-NEXT: $f10_d = COPY [[FPEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $f10_d
%0:_(s16) = COPY $f10_h
%1:_(s64) = G_FPEXT %0(s16)
$f10_d = COPY %1(s64)
PseudoRET implicit $f10_d
...
---
name: fptrunc_f64
body: |
bb.1:
liveins: $f10_d
; CHECK-LABEL: name: fptrunc_f64
; CHECK: liveins: $f10_d
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $f10_d
; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[COPY]](s64)
; CHECK-NEXT: $f10_h = COPY [[FPTRUNC]](s16)
; CHECK-NEXT: PseudoRET implicit $f10_h
%0:_(s64) = COPY $f10_d
%1:_(s16) = G_FPTRUNC %0(s64)
$f10_h = COPY %1(s16)
PseudoRET implicit $f10_h
...
Original file line number Diff line number Diff line change
@@ -0,0 +1,92 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -mattr=+d,zfh -run-pass=regbankselect \
# RUN: -simplify-mir -verify-machineinstrs %s \
# RUN: -o - | FileCheck %s
# RUN: llc -mtriple=riscv64 -mattr=+d,zfh -run-pass=regbankselect \
# RUN: -simplify-mir -verify-machineinstrs %s \
# RUN: -o - | FileCheck %s

---
name: fpext_f32
legalized: true
tracksRegLiveness: true
body: |
bb.1:
liveins: $f10_h
; CHECK-LABEL: name: fpext_f32
; CHECK: liveins: $f10_h
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:fprb(s16) = COPY $f10_h
; CHECK-NEXT: [[FPEXT:%[0-9]+]]:fprb(s32) = G_FPEXT [[COPY]](s16)
; CHECK-NEXT: $f10_f = COPY [[FPEXT]](s32)
; CHECK-NEXT: PseudoRET implicit $f10_f
%0:_(s16) = COPY $f10_h
%1:_(s32) = G_FPEXT %0(s16)
$f10_f = COPY %1(s32)
PseudoRET implicit $f10_f
...
---
name: fptrunc_f32
legalized: true
tracksRegLiveness: true
body: |
bb.1:
liveins: $f10_f
; CHECK-LABEL: name: fptrunc_f32
; CHECK: liveins: $f10_f
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:fprb(s32) = COPY $f10_f
; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:fprb(s16) = G_FPTRUNC [[COPY]](s32)
; CHECK-NEXT: $f10_h = COPY [[FPTRUNC]](s16)
; CHECK-NEXT: PseudoRET implicit $f10_h
%0:_(s32) = COPY $f10_f
%1:_(s16) = G_FPTRUNC %0(s32)
$f10_h = COPY %1(s16)
PseudoRET implicit $f10_h
...
---
name: fpext_f64
legalized: true
tracksRegLiveness: true
body: |
bb.1:
liveins: $f10_h
; CHECK-LABEL: name: fpext_f64
; CHECK: liveins: $f10_h
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:fprb(s16) = COPY $f10_h
; CHECK-NEXT: [[FPEXT:%[0-9]+]]:fprb(s64) = G_FPEXT [[COPY]](s16)
; CHECK-NEXT: $f10_d = COPY [[FPEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $f10_d
%0:_(s16) = COPY $f10_h
%1:_(s64) = G_FPEXT %0(s16)
$f10_d = COPY %1(s64)
PseudoRET implicit $f10_d
...
---
name: fptrunc_f64
legalized: true
tracksRegLiveness: true
body: |
bb.1:
liveins: $f10_d
; CHECK-LABEL: name: fptrunc_f64
; CHECK: liveins: $f10_d
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:fprb(s64) = COPY $f10_d
; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:fprb(s16) = G_FPTRUNC [[COPY]](s64)
; CHECK-NEXT: $f10_h = COPY [[FPTRUNC]](s16)
; CHECK-NEXT: PseudoRET implicit $f10_h
%0:_(s64) = COPY $f10_d
%1:_(s16) = G_FPTRUNC %0(s64)
$f10_h = COPY %1(s16)
PseudoRET implicit $f10_h
...

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