Fix condition signed (mozilla#31)

* fix condition error Singned mean that sign bit is 1
luyahan · Sep 9, 2022 · f465697 · f465697
1 parent c228b03
commit f465697
Show file tree

Hide file tree

Showing 5 changed files with 34 additions and 8 deletions.
diff --git a/js/src/jit/BaselineCodeGen.cpp b/js/src/jit/BaselineCodeGen.cpp
@@ -634,6 +634,7 @@ bool BaselineCompilerCodeGen::emitNextIC() {
 
 template <>
 bool BaselineInterpreterCodeGen::emitNextIC() {
+  AutoCreatedBy acb(masm, "emitNextIC");
   saveInterpreterPCReg();
   masm.loadPtr(frame.addressOfInterpreterICEntry(), ICStubReg);
   masm.loadPtr(Address(ICStubReg, ICEntry::offsetOfFirstStub()), ICStubReg);

diff --git a/js/src/jit/riscv64/MacroAssembler-riscv64-inl.h b/js/src/jit/riscv64/MacroAssembler-riscv64-inl.h
@@ -172,17 +172,17 @@ template <typename T>
 void MacroAssembler::branchSub32(Condition cond,
                                  T src,
                                  Register dest,
-                                 Label* overflow) {
+                                 Label* label) {
   switch (cond) {
     case Overflow:
-      ma_sub32TestOverflow(dest, dest, src, overflow);
+      ma_sub32TestOverflow(dest, dest, src, label);
       break;
     case NonZero:
     case Zero:
     case Signed:
     case NotSigned:
       ma_sub32(dest, dest, src);
-      ma_b(dest, dest, overflow, cond);
+      ma_b(dest, dest, label, cond);
       break;
     default:
       MOZ_CRASH("NYI");

diff --git a/js/src/jit/riscv64/MacroAssembler-riscv64.cpp b/js/src/jit/riscv64/MacroAssembler-riscv64.cpp
@@ -3604,7 +3604,7 @@ void MacroAssemblerRiscv64::ma_branch(Label* L,
     if (is_trampoline_emitted() && jumpKind == LongJump) {
       if (cond != Always) {
         Label skip;
-        Condition neg_cond = NegateCondition(cond);
+        Condition neg_cond = InvertCondition(cond);
         ma_branch(&skip, neg_cond, rs, rt);
         BranchLong(L);
         bind(&skip);
@@ -3701,11 +3701,11 @@ void MacroAssemblerRiscv64::ma_b(Register lhs,
       break;
     case Signed:
       MOZ_ASSERT(lhs == rhs);
-      ma_branch(label, GreaterThan, lhs, Operand(zero), jumpKind);
+      ma_branch(label, LessThan, lhs, Operand(zero), jumpKind);
       break;
     case NotSigned:
       MOZ_ASSERT(lhs == rhs);
-      ma_branch(label, LessThan, lhs, Operand(zero), jumpKind);
+      ma_branch(label, GreaterThan, lhs, Operand(zero), jumpKind);
       break;
     default: {
       ma_branch(label, c, lhs, rhs, jumpKind);

diff --git a/js/src/jit/riscv64/Simulator-riscv64.cpp b/js/src/jit/riscv64/Simulator-riscv64.cpp
@@ -654,7 +654,7 @@ void RiscvDebugger::Debug() {
           cur += kInstrSize;
         }
       } else if (strcmp(cmd, "trace") == 0) {
-        UNIMPLEMENTED();
+         Simulator::FLAG_trace_sim = true;
       } else if (strcmp(cmd, "break") == 0 || strcmp(cmd, "b") == 0 ||
                  strcmp(cmd, "tbreak") == 0) {
         bool is_tbreak = strcmp(cmd, "tbreak") == 0;
@@ -2123,7 +2123,16 @@ void Simulator::SoftwareInterrupt() {
       handleStop(code);
     }
   } else {
-    UNSUPPORTED();
+//     uint8_t code = get_ebreak_code(instr_.instr()) - kMaxStopCode - 1;
+//     switch (JSOp(code)) { 
+// #define EMIT_OP(OP, ...)  \
+//       case JSOp::OP:\
+//            std::cout << #OP << std::endl; \
+//            break;
+//     FOR_EACH_OPCODE(EMIT_OP);
+// #undef EMIT_OP
+//     }
+    DieOrDebug();
   }
 }
 

diff --git a/riscv64config/x64 b/riscv64config/x64
@@ -0,0 +1,16 @@
+# Build only the JS shell
+ac_add_options --enable-application=js
+
+# Enable optimization for speed
+ac_add_options  --disable-optimize
+
+# Disable debug checks to better match a release build of Firefox.
+ac_add_options --enable-debug
+
+# Use a separate objdir for optimized builds to allow easy
+# switching between optimized and debug builds while developing.
+mk_add_options MOZ_OBJDIR=@TOPSRCDIR@/obj-opt-@CONFIG_GUESS@
+ac_add_options --enable-jitspew
+ac_add_options --disable-bootstrap
+ac_add_options --disable-rust-simd
+ac_add_options --disable-wasm-memory64