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Add support for ATmega128RFA1
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twasilczyk committed Aug 19, 2021
1 parent 58fb37c commit 564d167
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93 changes: 93 additions & 0 deletions devices/avr/atmega-128-rfa1.xml
Original file line number Diff line number Diff line change
@@ -0,0 +1,93 @@
<?xml version='1.0' encoding='UTF-8'?>
<modm version="0.4.0">
<!-- WARNING: This file is generated by the modm device file generator. Do not edit! -->
<device platform="avr" family="mega" name="128" type="rfa1" speed="" package="zf|zfr|zu|zu00|zur|zur00">
<naming-schema>at{family}{name}{type}-{speed}{package}</naming-schema>
<attribute-mcu value="m128rfa1"/>
<driver name="core" type="avr8">
<fcpu value="16000000"/>
<memory name="eeprom" size="4096"/>
<memory name="flash" size="131072"/>
<memory name="ram" size="16384"/>
</driver>
<driver name="ac" type="avr"/>
<driver name="adc" type="avr"/>
<driver name="clock" type="avr"/>
<driver name="eeprom" type="avr"/>
<driver name="flash" type="avr"/>
<driver name="pwrctrl" type="avr"/>
<driver name="spi" type="avr"/>
<driver name="symcnt" type="avr"/>
<driver name="tc" type="tc16">
<instance value="1"/>
<instance value="3"/>
<instance value="4"/>
<instance value="5"/>
</driver>
<driver name="tc" type="tc8">
<instance value="0"/>
</driver>
<driver name="tc" type="tc8_async">
<instance value="2"/>
</driver>
<driver name="trx24" type="avr"/>
<driver name="twi" type="avr"/>
<driver name="usart" type="avr">
<instance value="0"/>
<instance value="1"/>
</driver>
<driver name="wdt" type="avr"/>
<driver name="gpio" type="avr">
<gpio port="B" pin="0"/>
<gpio port="B" pin="1"/>
<gpio port="B" pin="2"/>
<gpio port="B" pin="3"/>
<gpio port="B" pin="4"/>
<gpio port="B" pin="5"/>
<gpio port="B" pin="6"/>
<gpio port="B" pin="7"/>
<gpio port="D" pin="0"/>
<gpio port="D" pin="1"/>
<gpio port="D" pin="2">
<signal driver="usart" instance="1" name="rxd"/>
</gpio>
<gpio port="D" pin="3">
<signal driver="usart" instance="1" name="txd"/>
</gpio>
<gpio port="D" pin="4"/>
<gpio port="D" pin="5">
<signal driver="usart" instance="1" name="xck"/>
</gpio>
<gpio port="D" pin="6"/>
<gpio port="D" pin="7"/>
<gpio port="E" pin="0">
<signal driver="usart" instance="0" name="rxd"/>
</gpio>
<gpio port="E" pin="1">
<signal driver="usart" instance="0" name="txd"/>
</gpio>
<gpio port="E" pin="2">
<signal driver="usart" instance="0" name="xck"/>
</gpio>
<gpio port="E" pin="3"/>
<gpio port="E" pin="4"/>
<gpio port="E" pin="5"/>
<gpio port="E" pin="6"/>
<gpio port="E" pin="7"/>
<gpio port="F" pin="0"/>
<gpio port="F" pin="1"/>
<gpio port="F" pin="2"/>
<gpio port="F" pin="3"/>
<gpio port="F" pin="4"/>
<gpio port="F" pin="5"/>
<gpio port="F" pin="6"/>
<gpio port="F" pin="7"/>
<gpio port="G" pin="0"/>
<gpio port="G" pin="1"/>
<gpio port="G" pin="2"/>
<gpio port="G" pin="3"/>
<gpio port="G" pin="4"/>
<gpio port="G" pin="5"/>
</driver>
</device>
</modm>
204 changes: 204 additions & 0 deletions tools/generator/raw-data-extractor/patches/avr.patch
Original file line number Diff line number Diff line change
Expand Up @@ -89,3 +89,207 @@ index 02a8cc3..4cbd66d 100644
<signal field="USIPOS" function="USI_ALT" group="SDA" pad="PA0"/>
<signal field="USIPOS" function="USI" group="DI" pad="PB0"/>
<signal field="USIPOS" function="USI" group="DO" pad="PB1"/>
diff --git a/avr-devices/atmega/ATmega128RFA1.atdf b/avr-devices/atmega/ATmega128RFA1.atdf
index 7cfe8a8..81a07eb 100644
--- a/avr-devices/atmega/ATmega128RFA1.atdf
+++ b/avr-devices/atmega/ATmega128RFA1.atdf
@@ -1,7 +1,12 @@
<?xml version='1.0' encoding='UTF-8'?>
<avr-tools-device-file xmlns:xalan="http://xml.apache.org/xalan" xmlns:NumHelper="NumHelper" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" schema-version="0.3" xsi:noNamespaceSchemaLocation="../../schema/avr_tools_device_file.xsd">
<variants>
- <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="3.6"/>
+ <variant ordercode="ATmega128RFA1-ZU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64" package="QFN64" vccmin="1.8" vccmax="3.6"/>
+ <variant ordercode="ATmega128RFA1-ZUR" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64" package="QFN64" vccmin="1.8" vccmax="3.6"/>
+ <variant ordercode="ATmega128RFA1-ZU00" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64" package="QFN64" vccmin="1.8" vccmax="3.6"/>
+ <variant ordercode="ATmega128RFA1-ZUR00" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64" package="QFN64" vccmin="1.8" vccmax="3.6"/>
+ <variant ordercode="ATmega128RFA1-ZF" tempmin="-40" tempmax="125" speedmax="16000000" pinout="QFN64" package="QFN64" vccmin="1.8" vccmax="3.6"/>
+ <variant ordercode="ATmega128RFA1-ZFR" tempmin="-40" tempmax="125" speedmax="16000000" pinout="QFN64" package="QFN64" vccmin="1.8" vccmax="3.6"/>
</variants>
<devices>
<device name="ATmega128RFA1" architecture="AVR8" family="megaAVR">
@@ -44,9 +49,19 @@
<module name="USART">
<instance name="USART0" caption="USART">
<register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
+ <signals>
+ <signal group="RXD" function="default" pad="PE0"/>
+ <signal group="TXD" function="default" pad="PE1"/>
+ <signal group="XCK" function="default" pad="PE2"/>
+ </signals>
</instance>
<instance name="USART1" caption="USART">
<register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
+ <signals>
+ <signal group="RXD" function="default" pad="PD2"/>
+ <signal group="TXD" function="default" pad="PD3"/>
+ <signal group="XCK" function="default" pad="PD5"/>
+ </signals>
</instance>
</module>
<module name="TWI">
@@ -68,24 +83,92 @@
<module name="PORT">
<instance name="PORTA" caption="I/O Port">
<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+ <signals>
+ <signal group="P" function="default" pad="PA0" index="0"/>
+ <signal group="P" function="default" pad="PA1" index="1"/>
+ <signal group="P" function="default" pad="PA2" index="2"/>
+ <signal group="P" function="default" pad="PA3" index="3"/>
+ <signal group="P" function="default" pad="PA4" index="4"/>
+ <signal group="P" function="default" pad="PA5" index="5"/>
+ <signal group="P" function="default" pad="PA6" index="6"/>
+ <signal group="P" function="default" pad="PA7" index="7"/>
+ </signals>
</instance>
<instance name="PORTB" caption="I/O Port">
<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+ <signals>
+ <signal group="P" function="default" pad="PB0" index="0"/>
+ <signal group="P" function="default" pad="PB1" index="1"/>
+ <signal group="P" function="default" pad="PB2" index="2"/>
+ <signal group="P" function="default" pad="PB3" index="3"/>
+ <signal group="P" function="default" pad="PB4" index="4"/>
+ <signal group="P" function="default" pad="PB5" index="5"/>
+ <signal group="P" function="default" pad="PB6" index="6"/>
+ <signal group="P" function="default" pad="PB7" index="7"/>
+ </signals>
</instance>
<instance name="PORTC" caption="I/O Port">
<register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
+ <signals>
+ <signal group="P" function="default" pad="PC0" index="0"/>
+ <signal group="P" function="default" pad="PC1" index="1"/>
+ <signal group="P" function="default" pad="PC2" index="2"/>
+ <signal group="P" function="default" pad="PC3" index="3"/>
+ <signal group="P" function="default" pad="PC4" index="4"/>
+ <signal group="P" function="default" pad="PC5" index="5"/>
+ <signal group="P" function="default" pad="PC6" index="6"/>
+ <signal group="P" function="default" pad="PC7" index="7"/>
+ </signals>
</instance>
<instance name="PORTD" caption="I/O Port">
<register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
+ <signals>
+ <signal group="P" function="default" pad="PD0" index="0"/>
+ <signal group="P" function="default" pad="PD1" index="1"/>
+ <signal group="P" function="default" pad="PD2" index="2"/>
+ <signal group="P" function="default" pad="PD3" index="3"/>
+ <signal group="P" function="default" pad="PD4" index="4"/>
+ <signal group="P" function="default" pad="PD5" index="5"/>
+ <signal group="P" function="default" pad="PD6" index="6"/>
+ <signal group="P" function="default" pad="PD7" index="7"/>
+ </signals>
</instance>
<instance name="PORTE" caption="I/O Port">
<register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
+ <signals>
+ <signal group="P" function="default" pad="PE0" index="0"/>
+ <signal group="P" function="default" pad="PE1" index="1"/>
+ <signal group="P" function="default" pad="PE2" index="2"/>
+ <signal group="P" function="default" pad="PE3" index="3"/>
+ <signal group="P" function="default" pad="PE4" index="4"/>
+ <signal group="P" function="default" pad="PE5" index="5"/>
+ <signal group="P" function="default" pad="PE6" index="6"/>
+ <signal group="P" function="default" pad="PE7" index="7"/>
+ </signals>
</instance>
<instance name="PORTF" caption="I/O Port">
<register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
+ <signals>
+ <signal group="P" function="default" pad="PF0" index="0"/>
+ <signal group="P" function="default" pad="PF1" index="1"/>
+ <signal group="P" function="default" pad="PF2" index="2"/>
+ <signal group="P" function="default" pad="PF3" index="3"/>
+ <signal group="P" function="default" pad="PF4" index="4"/>
+ <signal group="P" function="default" pad="PF5" index="5"/>
+ <signal group="P" function="default" pad="PF6" index="6"/>
+ <signal group="P" function="default" pad="PF7" index="7"/>
+ </signals>
</instance>
<instance name="PORTG" caption="I/O Port">
<register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
+ <signals>
+ <signal group="P" function="default" pad="PG0" index="0"/>
+ <signal group="P" function="default" pad="PG1" index="1"/>
+ <signal group="P" function="default" pad="PG2" index="2"/>
+ <signal group="P" function="default" pad="PG3" index="3"/>
+ <signal group="P" function="default" pad="PG4" index="4"/>
+ <signal group="P" function="default" pad="PG5" index="5"/>
+ </signals>
</instance>
</module>
<module name="TC8">
@@ -2214,4 +2297,72 @@
</value-group>
</module>
</modules>
+ <pinouts>
+ <pinout name="QFN64" caption="QFN64">
+ <pin position="1" pad="PF2"/>
+ <pin position="2" pad="PF3"/>
+ <pin position="3" pad="PF4"/>
+ <pin position="4" pad="PF5"/>
+ <pin position="5" pad="PF6"/>
+ <pin position="6" pad="PF7"/>
+ <pin position="7" pad="GND"/>
+ <pin position="8" pad="RFP"/>
+ <pin position="9" pad="RFN"/>
+ <pin position="10" pad="GND"/>
+ <pin position="11" pad="TST"/>
+ <pin position="12" pad="RESET"/>
+ <pin position="13" pad="RSTON"/>
+ <pin position="14" pad="PG0"/>
+ <pin position="15" pad="PG1"/>
+ <pin position="16" pad="PG2"/>
+ <pin position="17" pad="PG3"/>
+ <pin position="18" pad="PG4"/>
+ <pin position="19" pad="PG5"/>
+ <pin position="20" pad="GND"/>
+ <pin position="21" pad="DVDD"/>
+ <pin position="22" pad="DVDD"/>
+ <pin position="23" pad="VCC"/>
+ <pin position="24" pad="GND"/>
+ <pin position="25" pad="PD0"/>
+ <pin position="26" pad="PD1"/>
+ <pin position="27" pad="PD2"/>
+ <pin position="28" pad="PD3"/>
+ <pin position="29" pad="PD4"/>
+ <pin position="30" pad="PD5"/>
+ <pin position="31" pad="PD6"/>
+ <pin position="32" pad="PD7"/>
+ <pin position="33" pad="CLKI"/>
+ <pin position="34" pad="VCC"/>
+ <pin position="35" pad="GND"/>
+ <pin position="36" pad="PB0"/>
+ <pin position="37" pad="PB1"/>
+ <pin position="38" pad="PB2"/>
+ <pin position="39" pad="PB3"/>
+ <pin position="40" pad="PB4"/>
+ <pin position="41" pad="PB5"/>
+ <pin position="42" pad="PB6"/>
+ <pin position="43" pad="PB7"/>
+ <pin position="44" pad="VCC"/>
+ <pin position="45" pad="GND"/>
+ <pin position="46" pad="PE0"/>
+ <pin position="47" pad="PE1"/>
+ <pin position="48" pad="PE2"/>
+ <pin position="49" pad="PE3"/>
+ <pin position="50" pad="PE4"/>
+ <pin position="51" pad="PE5"/>
+ <pin position="52" pad="PE6"/>
+ <pin position="53" pad="PE7"/>
+ <pin position="54" pad="VCC"/>
+ <pin position="55" pad="GND"/>
+ <pin position="56" pad="XTAL2"/>
+ <pin position="57" pad="XTAL1"/>
+ <pin position="58" pad="AGND"/>
+ <pin position="59" pad="AVCC"/>
+ <pin position="60" pad="AVCC"/>
+ <pin position="61" pad="AGND"/>
+ <pin position="62" pad="AREF"/>
+ <pin position="63" pad="PF0"/>
+ <pin position="64" pad="PF1"/>
+ </pinout>
+ </pinouts>
</avr-tools-device-file>

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